參數(shù)資料
型號: MC74HC4351AN
廠商: MOTOROLA INC
元件分類: 運(yùn)動控制電子
英文描述: ECONOLINE: RU - Twin Independent Outputs- Output/Output Isolation 1kVDC- Power Sharing on Outputs- Input/Output Isolation 1kVDC- No Heatsink Required- UL94V-0 Package Material- Toroidal Magnetics- No Extern. Components Required- Custom Solutions Available- Efficiency t
中文描述: 8-CHANNEL, SGL ENDED MULTIPLEXER, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 4/13頁
文件大?。?/td> 294K
代理商: MC74HC4351AN
MC74HC4351A
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
4
Analog Section
Unit
125 C
25 C
V
V
Test Conditions
Parameter
Symbol
Ioff
AC ELECTRICAL CHARACTERISTICS
(CL = 50 pF, Input tr = tf = 6 ns)
NOTES:
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
85 C
VEE
VCC
Switch Off (Figure 4)
Switch Off (Figure 3)
6.0
Vin = VIL or VIH
– 6.0
6.0
0.2
2.0
0.1
0.5
4.0
1.0
μ
A
Maximum Off–Channel Leakage
Current, Common Channel
Current, Channel to Channel
Symbol
b l
tPHL
(Figure 9)
Parameter
Guaranteed Limit
– 55 to
25 C
125 C
110
94
U i
tPHL
(Figure 10)
93
15
13
Common O/I
12
10
4.5
370
74
70
pF
Maximum Propagation Delay, Analog Input to Analog Output
4.5
6.0
6.0
62
18
15
Maximum Propagation Delay, Latch Enable to Analog Output
(Figure 12)
2.0
59
6.0
55
365
82
tPLZ,
Maximum Propagation Delay, Enable 1 or 2 to Analog Output
49
290
74
435
74
ns
Maximum Propagation Delay, Enable 1 or 2 to Analog Output
6.0
2.0
345
35
130
130
435
515
87
ns
Enable 1 = VIH, Enable 2 = VIL
35
35
130
Feedthrough
1.0
1.0
1.0
CPD
Power Dissipation Capacitance (Per Package) (Figure 14)*
Typical @ 25
°
C, VCC = 5.0 V
45
pF
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
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