參數(shù)資料
型號: MC74HC107D
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Dual J-K Flip-Flop with Reset
中文描述: HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
封裝: PLASTIC, SOIC-14
文件頁數(shù): 4/5頁
文件大?。?/td> 171K
代理商: MC74HC107D
MC74HC107
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
4
SWITCHING WAVEFORMS
tsu
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CLOCK
Q OR Q
90%
50%
10%
tf
tr
VCC
GND
tw
1/fmax
tPLH
tPHL
90%
50%
10%
tTLH
tTHL
Figure 1.
Figure 2.
Figure 3.
Figure 4. Test Circuit
50%
50%
50%
50%
VCC
VCC
GND
GND
RESET
Q
Q
CLOCK
tPLH
tPHL
trec
tw
VALID
50%
J OR K
CLOCK
VCC
VCC
GND
GND
th
EXPANDED LOGIC DIAGRAM
RESET
K
CLOCK
13, 10
1, 8
4, 11
12, 9
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
CL
Q
Q
3, 5
CL
CL
CL
J
50%
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