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參數(shù)資料
| 型號： | MC74F112D |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 1.2 to 5.5 V 10-A, 12-V Input Non-Isolated Wide-Adjust Module 10-DIP MODULE -40 to 85 |
| 中文描述： | F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16 |
| 封裝： | SOIC-16 |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 66K |
| 代理商： | MC74F112D |
4-45
FAST AND LS TTL DATA
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The MC74F112 contains two independent, high-speed JK flip-flops with Di-
rect Set and Clear inputs. Synchronous state changes are initiated by the fal-
ling edge of the clock. Triggering occurs at a voltage level of the clock and is
not directly related to the transition time. The J and K inputs can change when
the clock is in either state without affecting the flip-flop, provided that they are
in the desired state during the recommended setup and hold times relative to
the falling edge of the clock. A LOW signal on SD or CD prevents clocking and
forces Q or Q HIGH, respectively. Simultaneous LOW signals on SD and CD
force both Q and Q HIGH.
SD1
2
1
3
4
6
7
8
GND
CP1
J1
K1
Q1
Q1
Q2
5
CP
J
CD
CONNECTION DIAGRAM
SD
K
Q
15
16
14
13
11
10
9
VCC
CD1
CD2
CP2
J2
Q2
12
SD2
K2
Q
CP
K
SD
CD
J
Q
Q
FUNCTION TABLE (Each Half)
Inputs
Output
@ tn
@ tn + 1
Q
J
K
L
L
Qn
L
L
H
H
L
H
H
H
Qn
H = HIGH Voltage Level
L = LOW Voltage Level
tn = Bit time before clock pulse
tn + 1 = Bit time after clock pulse
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
16
1
D SUFFIX
SOIC
CASE 751B-03
5
9
MC74FXXXJ
MC74FXXXN
MC74FXXXD
Ceramic
Plastic
SOIC
MC74F112
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
FAST
SCHOTTKY TTL
ORDERING INFORMATION
LOGIC SYMBOL
4
6
1
3
15
10
11
13
7
14
VCC = PIN 16
GND = PIN 8
SD
J
CP
Q
Q
SD
J
CP
Q
Q
CD
2
12
K
K
Asynchronous Inputs:
LOW Input to SD sets Q to HIGH level
LOW Input to CD sets Q to LOW level
Clear and Set are independent of clock
Simultaneous LOW on CD and SD makes both Q and Q HIGH
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC74F112 | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP |
| MC74F112J | 1.2 to 5.5 V 10-A, 12-V Input Non-Isolated Wide-Adjust Module 10-DIP MODULE -40 to 85 |
| MC74F112N | 10 A 12-V Input Bus Termination Power Module for DDR/QDR Memory 10-DIP MODULE -40 to 85 |
| MC74F1803 | CLOCK DRIVER QUAD D-TYPE FLIP-FLOP WITH MATCHED PROPAGATION DELAYS |
| MC74F181 | Supply Voltage Supervisor w/Watchdog input and manual reset 5-SOT-23 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC74F112DR2 | 制造商:ON Semiconductor 功能描述:Flip Flop JK-Type Neg-Edge 2-Element 16-Pin SOIC T/R |
| MC74F112M | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74F112MEL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74F112ML1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74F112MR1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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