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鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉(h脿o)锛� | MC705C8ACFNER |
| 寤犲晢锛� | Freescale Semiconductor |
| 鏂囦欢闋�(y猫)鏁�(sh霉)锛� | 132/222闋�(y猫) |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC MCU 8BIT 44-PLCC |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 450 |
| 绯诲垪锛� | HC05 |
| 鏍稿績铏曠悊鍣細 | HC05 |
| 鑺珨灏哄锛� | 8-浣� |
| 閫熷害锛� | 2.1MHz |
| 閫ｉ€氭€э細 | SCI锛孲PI |
| 澶栧湇瑷�(sh猫)鍌欙細 | POR锛學DT |
| 杓稿叆/杓稿嚭鏁�(sh霉)锛� | 24 |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 | 8KB锛�8K x 8锛� |
| 绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 | OTP |
| RAM 瀹归噺锛� | 304 x 8 |
| 闆诲 - 闆绘簮 (Vcc/Vdd)锛� | 3 V ~ 5.5 V |
| 鎸暕鍣ㄥ瀷锛� | 鍏�(n猫i)閮� |
| 宸ヤ綔婧害锛� | -40°C ~ 85°C |
| 灏佽/澶栨锛� | 44-LCC锛圝 褰㈠紩绶氾級 |
| 鍖呰锛� | 甯跺嵎 (TR) |
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Index
MC68HC705C8A 鈥� Rev. 3
Technical Data
MOTOROLA
Index
COP watchdog resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
non-programmable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
non-programmable COP watchdog diagram . . . . . . . . . . . . . 67
programmable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
programmable COP watchdog diagram . . . . . . . . . . . . . . . . . 63
enabling both programmable and non-programmable COPs . . . 65
external reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
power-on reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
reset sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
ROM (bootloader) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
S
serial communications interface (SCI) . . . . . . . . . . . . . . . . . . . . . . . 121
baud rate generator clock prescaling . . . . . . . . . . . . . . . . . . . . . 136
baud rate register (baud) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
baud rate selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 137
baud rate selection examples . . . . . . . . . . . . . . . . . . . . . . . . . . 138
during stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
SCI control register 1 (SCCR1) . . . . . . . . . . . . . . . . . . . . . . . . . 130
SCI control register 2 (SCCR2) . . . . . . . . . . . . . . . . . . . . . . . . . 131
SCI data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
SCI data register (SCDR). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
SCI I/O registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
SCI interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
SCI operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
SCI receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
SCI status register (SCSR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
SCI transmitter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
serial peripheral interface (SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
during stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140
master/slave connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
pin functions in master mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
pin functions in slave mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 144
serial clock polarity and phase . . . . . . . . . . . . . . . . . . . . . . . . . . 146
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Freescale Semiconductor, Inc.
For More Information On This Product,
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鐩搁棞(gu膩n)PDF璩囨枡 |
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
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| MC705C8ACFNR2 | 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪: 鍒堕€犲晢:Freescale Semiconductor 鍔熻兘鎻忚堪: |
| MC705C8ACPBE | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8B MCU 304 BYTES RAM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| MC705C8ACPE | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU HC05 CORE + 8K RAM + EPR RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
| MC705C8ACPE | 鍒堕€犲晢:Freescale Semiconductor 鍔熻兘鎻忚堪:Microcontroller IC Number of I/Os:31 |
| MC705C9ACPE | 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 8B MCU -705C9A-EPP RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT |
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