參數(shù)資料
型號(hào): MC68SC302
廠(chǎng)商: Motorola, Inc.
英文描述: 32-Bit Microprocessor(32位微處理器)
中文描述: 32位微處理器(32位微處理器)
文件頁(yè)數(shù): 99/218頁(yè)
文件大?。?/td> 521K
代理商: MC68SC302
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Communications Processor (CP)
4-53
MC68SC302 USER’S MANUAL
MOTOROLA
SMC1 Transmission
The monitor channel is used to transfer commands to the layer-1 component. The host
writes the data byte into the SMC1 Tx BD. SMC1 will transmit the data on the monitor
channel.
The SMC1 channel transmitter can be programmed to work in one of two modes:
Transparent Mode
— In this mode, SMC1 transmits the monitor channel data and the A and E control bits
transparently into the channel. When the host has not written new data to the buffer,
the SMC1 transmitter will retransmit the previous monitor channel data and the A
and E control bits.
Monitor Channel Protocol
— In this mode, SMC1 transmits the data and handles the A and E control bits
according to the GCI monitor channel protocol. When using the monitor channel
protocol, the user may issue the TIMEOUT command to solve deadlocks in case of
bit errors in the A and E bit positions on data line. The SC302 will transmit an abort
on the E bit.
SMC1 Reception
The SMC1 receiver can be programmed to work in one of two modes:
Transparent Mode
— In this mode, SMC1 receives the data, moves the A and E control bits transparently
into the SMC1 receive BD, and generates a maskable interrupt. The SMC1 receiver
discards new data when the host has not read the receive BD.
Monitor Channel Protocol
— In this mode, SMC1 receives data and handles the A and E control bits according
to the GCI monitor channel protocol. When a received data byte is stored by the CP
in the SMC1 receive BD, a maskable interrupt is generated.
— When using the monitor channel protocol, the user may issue the TRANSMIT
ABORT REQUEST command. The SC302 will then transmit an abort request on
the A bit.
SMC2 Controls the GCI Command/Indication (C/I) Channel
SMC2 Transmission
— The host writes the data byte into the SMC2 Tx BD. SMC2 will transmit the data
continuously on the C/I channel to the physical layer device.
SMC2 Reception
— The SMC2 receiver continuously monitors the C/I channel. When a change in data
is recognized and this value is received in two successive frames, it will be
interpreted as valid data. The received data byte is stored by the CP in the SMC2
receive BD, and a maskable interrupt is generated.
— The receive and transmit clocks are derived from the same physical clock (L1CLK)
and are only active while serial data is transferred between the SMC controllers and
the serial interface.
— When SMC loopback mode is chosen, SMC transmitted data is routed to the SMC
receiver. Transmitted data appears on the L1TXD pin, unless the SDIAG1–SDIAG0
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