參數(shù)資料
型號(hào): MC68S711PH8CFN4
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PQCC84
封裝: PLASTIC, LCC-84
文件頁(yè)數(shù): 261/264頁(yè)
文件大?。?/td> 1469K
代理商: MC68S711PH8CFN4
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MOTOROLA
5-4
MC68HC11PH8
SERIAL COMMUNICATIONS INTERFACE
5
5.4
Wake-up feature
The wake-up feature reduces SCI service overhead in multiple receiver systems. Software for
each receiver evaluates the rst character or frame of each message. All receivers are placed in
wake-up mode by writing a one to the RWU bit in the SCCR2 register. When RWU is set, the
receiver-related status ags (RDRF, IDLE, OR, NF, FE, and PF) are inhibited (cannot be set).
Although RWU can be cleared by a software write to SCCR2, to do so would be unusual. Normally
RWU is set by software and is cleared automatically with hardware. Whenever a new message
begins, logic alerts the dormant receivers to wake up and evaluate the initial character of the new
message.
Two methods of wake-up are available: idle-line wake-up and address mark wake-up. During
idle-line wake-up, a dormant receiver activates as soon as the RXD line becomes idle. In the
address mark wake-up, logic one in the most signicant bit (MSB) of a character activates all
sleeping receivers. To use either receiver wake-up method, establish a software addressing
scheme to allow the transmitting devices to direct messages to individual receivers or to groups
of receivers. This addressing scheme can take any form as long as all transmitting and receiving
devices are programmed to understand the same scheme.
5.4.1
Idle-line wake-up
Clearing the WAKE bit in SCCR1 register enables idle-line wake-up mode. In idle-line wake-up
mode, all receivers are active (RWU bit in SCCR2 = 0) when each message begins. The rst
frames of each message are addressing frames. Each receiver in the system evaluates the
addressing frames of a message to determine if the message is intended for that receiver. When
a receiver nds that the message is not intended for it, it sets the RWU bit. Once set, the RWU
control bit disables all but the necessary receivers for the remainder of the message, thus reducing
software overhead for the remainder of that message. As soon as an idle line is detected by
receiver logic, hardware automatically clears the RWU bit so that the rst frames of the next
message can be evaluated by all receivers in the system. This type of receiver wake-up requires
a minimum of one idle frame time between messages, and no idle time between frames within a
message.
5.4.2
Address-mark wake-up
Setting the WAKE bit in SCCR1 register enables address-mark wake-up mode. The address-mark
wake-up method uses the MSB of each frame to differentiate between address information
(MSB = 1) and actual message data (MSB = 0). All frames consist of seven information bits (eight
bits if M bit in SCCR1 = 1) and an MSB which, when set to one, indicates an address frame. The
rst frames of each message are addressing frames. Receiver logic evaluates these marked
frames to determine the receivers for which that message is intended. When a receiver nds that
the message is not intended for it, it sets the RWU bit. Once set, the RWU control bit disables all
but the necessary receivers for the remainder of the message, thus reducing software overhead
TPG
94
相關(guān)PDF資料
PDF描述
MC68S711PH8CFS3 8-BIT, UVPROM, 3 MHz, MICROCONTROLLER, CQCC84
MC68S11PH8CPV4 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP112
MC68S711PH8CFS4 8-BIT, UVPROM, 4 MHz, MICROCONTROLLER, CQCC84
MC68HC12BC32VFU8 16-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80
MC68HC12BC32MFU8 16-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80
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