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  • 參數資料
    型號: MC68HSC05C8FB
    廠商: MOTOROLA INC
    元件分類: 微控制器/微處理器
    英文描述: 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP44
    封裝: QFP-44
    文件頁數: 137/156頁
    文件大?。?/td> 1755K
    代理商: MC68HSC05C8FB
    Serial Communications Interface (SCI)
    SCI Input/Output (I/O) Registers
    MC68HC05C8A — Rev. 4.0
    Advance Information
    MOTOROLA
    Serial Communications Interface (SCI)
    81
    Reset sets the TC bit. Software must initialize the TC bit to logic 0 to
    avoid an instant interrupt request when turning on the transmitter.
    1 = No transmission in progress
    0 = Transmission in progress
    RDRF — Receive Data Register Full Bit
    This clearable, read-only bit is set when the data in the receive shift
    register transfers to the SCI data register. RDRF generates an
    interrupt request if the RIE bit in SCCR2 is also set. Clear the RDRF
    bit by reading the SCSR with RDRF set, and then reading the SCDR.
    Reset clears the RDRF bit.
    1 = Received data available in SCDR
    0 = Received data not available in SCDR
    IDLE — Receiver Idle Bit
    This clearable, read-only bit is set when 10 or 11 consecutive logic 1s
    appear on the receiver input. IDLE generates an interrupt request if
    the ILIE bit in SCCR2 is also set. Clear the IDLE bit by reading the
    SCSR with IDLE set, and then reading the SCDR. Reset clears the
    IDLE bit.
    1 = Receiver input idle
    0 = Receiver input not idle
    OR — Receiver Overrun Bit
    This clearable, read-only bit is set if the SCDR is not read before the
    receive shift register receives the next word. OR generates an
    interrupt request if the RIE bit in SCCR2 is also set. The data in the
    shift register is lost, but the data already in the SCDR is not affected.
    Clear the OR bit by reading the SCSR with OR set and then reading
    the SCDR. Reset clears the OR bit.
    1 = Receiver shift register full and RDRF = 1
    0 = No receiver overrun
    NF — Receiver Noise Flag
    This clearable, read-only bit is set when noise is detected in data
    received in the SCI data register. Clear the NF bit by reading the
    SCSR and then reading the SCDR. Reset clears the NF bit.
    1 = Noise detected in SCDR
    0 = No noise detected in SCDR
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