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參數(shù)資料
| 型號： | MC68HSC05C8AP |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 28/116頁 |
| 文件大?。?/td> | 781K |
| 代理商： | MC68HSC05C8AP |
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Functional Pin Description
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A Data Sheet, Rev. 5.1
Freescale Semiconductor
19
1.4.1 VDD and VSS
Power is supplied to the microcontroller using these two pins. VDD is the positive supply and VSS is
ground.
1.4.2 IRQ
This pin has a mask selectable option that provides two different choices of interrupt triggering sensitivity.
The IRQ pin contains an internal Schmitt trigger as part of its input to improve noise immunity. Refer to
Chapter 4 Interrupts for more detail.
1.4.3 OSC1 and OSC2
These pins provide control input for an on-chip clock oscillator circuit. A crystal, a ceramic resonator, a
resistor/capacitor combination, or an external signal connects to these pins providing a system clock. The
internal bus rate is one-half the external oscillator frequency.
1.4.4 RESET
This active low pin is used to reset the MCU to a known startup state by pulling RESET low. The RESET
pin contains an internal Schmitt trigger as part of its input to improve noise immunity.
1.4.5 TCAP
This pin controls the input capture feature for the on-chip programmable timer. The TCAP pin contains an
internal Schmitt trigger as part of its input to improve noise immunity.
1.4.6 TCMP
The TCMP pin provides an output for the output compare feature of the on-chip timer subsystem.
1.4.7 Port A (PA0–PA7)
These eight input/output (I/O) lines comprise port A. The state of any pin is software programmable and
all port A lines are configured as input during power-on or reset. For detailed information on I/O
programming, see 7.6 Input/Output Programming.
1.4.8 Port B (PB0–PB7)
These eight I/O lines comprise port B. The state of any pin is software programmable, and all port B lines
are configured as input during power-on or reset. Port B has mask option enabled pullup devices and
interrupt capability by pin. The interrupts and pullups are enabled together. For a detailed description on
I/O programming, refer to 7.6 Input/Output Programming.
1.4.9 Port C (PC0–PC7)
These eight I/O lines comprise port C. The state of any pin is software programmable and all port C lines
are configured as input during power-on or reset. PC7 has high current sink and source capability. For a
detailed description on I/O programming, refer to 7.6 Input/Output Programming.
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