參數(shù)資料
型號: MC68HRC705J5ACDWR3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝: SOIC-20
文件頁數(shù): 12/106頁
文件大?。?/td> 1069K
代理商: MC68HRC705J5ACDWR3
July 16, 1999
GENERAL RELEASE SPECIFICATION
MC68HC05J5A
GENERAL DESCRIPTION
MOTOROLA
REV 2.1
1-3
Figure 1-1. MC68HC05J5A Block Diagram
OSCILLATOR
AND DIVIDE
BY 2
OSC1
128 BYTES
RAM
2560 BYTES
ROM
PA0x
PA1x
PA2x
PA3x
PA4y
PA5y
PA6z
PA7{
DATA
DIR
REG
PORT
A
REG
IRQ
VDD
VSS
STK PTR
COND CODE REG 1 1 1
I N Z C
H
INDEX REG
CPU CONTROL
0 0 0
1
0
ALU
68HC05 CPU
ACCUM
PROGRAM COUNTER
CPU REGISERS
OSC2/R
RESET
CORE
TIMER
(COP)
LOW
VOLTAGE
RESET
PB0|
PB1}
PB2}~
PB3~
PB4~
PB5~
DATA
DIR
REG
PORT
B
REG
y: 8 mA current sink
|: Shared pin: PB0/TCAP
x: External edge interrupt capability
z: Open-drained with internal pull-up and
8 mA current sink
{: External interrupt capability, open-drained
with internal pull-up and 8 mA current sink
~: not bonded out in 16-pin package
}: 25 mA current sink open-drained with
internal pull-up
16-BIT
TIMER
TCAP|
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