Input/Output Ports (PORTS)
Data Sheet
MC68HLC908QY/QT Family — Rev. 2
106
Input/Output Ports (PORTS)
MOTOROLA
12.2.3 Port A Input Pullup Enable Register
The port A input pullup enable register (PTAPUE) contains a software configurable
pullup device for each if the six port A pins. Each bit is individually configurable and
requires the corresponding data direction register, DDRAx, to be configured as
input. Each pullup device is automatically and dynamically disabled when its
corresponding DDRAx bit is configured as output.
OSC2EN — Enable PTA4 on OSC2 Pin
This read/write bit configures the OSC2 pin function when internal oscillator or
RC oscillator option is selected. This bit has no effect for the XTAL or external
oscillator options.
1 = OSC2 pin outputs the internal or RC oscillator clock (BUSCLKX4)
0 = OSC2 pin configured for PTA4 I/O, having all the interrupt and pullup
functions
PTAPUE[5:0] — Port A Input Pullup Enable Bits
These read/write bits are software programmable to enable pullup devices on
port A pins.
1 = Corresponding port A pin configured to have internal pull if its DDRA bit
is set to 0
0 = Pullup device is disconnected on the corresponding port A pin regardless
of the state of its DDRA bit
Table 12-1 summarizes the operation of the port A pins.
Address: $000B
Bit 7
654321
Bit 0
Read:
OSC2EN
PTAPUE5
PTAPUE4
PTAPUE3
PTAPUE2
PTAPUE1
PTAPUE0
Write:
Reset:
00000000
= Unimplemented
Figure 12-5. Port A Input Pullup Enable Register (PTAPUE)
Table 12-1. Port A Pin Functions
PTAPUE
Bit
DDRA
Bit
PTA
Bit
I/O Pin
Mode
Accesses to DDRA
Accesses to PTA
Read/Write
Read
Write
10
X(1)
Input, VDD
(2)
DDRA5–DDRA0
Pin
PTA5–PTA0(3)
00
X
Input, Hi-Z(4)
DDRA5–DDRA0
Pin
PTA5–PTA0(3)
X
1
X
Output
DDRA5–DDRA0
PTA5–PTA0
PTA5–PTA0(5)
1. X = don’t care
2. I/O pin pulled to VDD by internal pullup.
3. Writing affects data register, but does not affect input.
4. Hi-Z = high impedance
5. Output does not apply to PTA2