參數(shù)資料
型號： MC68HCP11A1CP2
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： HCMOS Single-Chip Microcontroller
中文描述： 8-BIT, 2 MHz, MICROCONTROLLER, PDIP48
封裝： DIP-48
文件頁數(shù)： 89/158頁
文件大?。?/td> 776K
代理商： MC68HCP11A1CP2
MC68HC11A8
TECHNICAL DATA
RESETS, INTERRUPTS, AND LOW POWER MODES
MOTOROLA
9-9
9
9.2.1 Software Interrupt (SWI)
The software interrupt is executed in the same manner as any other instruction and
will take precedence over interrupts only if the other interrupts are masked (I and X bits
in the condition code register set). The SWI instruction is executed in a manner similar
to other maskable interrupts in that it sets the I bit, CPU registers are stacked, etc.
NOTE
The SWI instruction will not be fetched if an interrupt is pending.
However, once an SWI instruction has begun, no interrupt can be
honored until the SWI vector has been fetched.
Figure 9-3 Interrupt Stacking Order
9.2.2 Illegal Opcode Trap
Since not all possible opcodes or opcode sequences are defined, an illegal opcode de-
tection circuit has been included. When an illegal opcode is detected, an interrupt is
requested to the illegal opcode vector. The illegal opcode vector should never be left
uninitialized. It is a good idea to reinitialize the stack pointer as a result of an illegal
opcode interrupt so repeated execution of illegal opcodes does not cause stack over-
runs.
9.2.3 Interrupt Mask Bits in Condition Code Register
Upon reset, both the X bit and the I bit are set to inhibit all maskable interrupts and
XIRQ. After minimum system initialization, software may clear the X bit by a TAP in-
struction, thus enabling XIRQ interrupts. Thereafter software cannot set the X bit so
an XIRQ interrupt is effectively a nonmaskable interrupt. Since the operation of the I
Table 9-4 SCI Serial System Interrupts
Interrupt Cause
Receive Data Register Full
Receiver Overrun
Idle Line Detect
Transmit Data Register Empty
Transmit Complete
Local Mask
RIE
RIE
ILIE
TIE
TCIE
PCL
PCH
IYL
IYH
IXL
IXH
ACCA
ACCB
CCR
SP
— SP BEFORE INTERRUPT
SP–1
SP–2
SP–3
SP–4
SP–5
SP–6
SP–7
SP–8
SP–9
— SP AFTER INTERRUPT
7
0
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相關代理商/技術參數(shù)
參數(shù)描述
MC68HCP11A1FN 制造商:MOTORALA 功能描述:
MC68HCP11E0CP2 制造商:Rochester Electronics LLC 功能描述:- Bulk
MC68HCP11E0FN 功能描述:MICROCONTROLLER MCU 8ADC 3MHC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC11 標準包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323
MC68HCP11E0FNE 功能描述:8位微控制器 -MCU 8B MCU 512RAM COP A/D RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
MC68HCP11E1CFNE2 功能描述:8位微控制器 -MCU 8B MCU 512 BYTES RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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