參數(shù)資料
型號: MC68HCP11A1CP2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Single-Chip Microcontroller
中文描述: 8-BIT, 2 MHz, MICROCONTROLLER, PDIP48
封裝: DIP-48
文件頁數(shù): 111/158頁
文件大小: 776K
代理商: MC68HCP11A1CP2
MC68HC11A8
TECHNICAL DATA
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MOTOROLA
10-13
10
Table 10-2 Cycle-by-Cycle Operation — Inherent Mode (Sheet 1 of 4)
Reference
Number*
2-1
Address Mode
and Instructions
ABA, ASLA, ASLB,
ASRA, ASRB, CBA,
CLC, CLI, CLRA,
CLRB, CLV, COMA,
COMB, DAA, DECA,
DECB, INCA, INCB,
LSLA, LSLB, LSRA,
LSRB, NEGA, NEGB,
NOP, ROLA, ROLB,
RORA, RORB, SBA,
SEC, SEI, SEV, STOP,
TAB, TAP, TBA, TPA,
TSTA, TSTB
ABX, ASLD, DEX, INX,
LSLD, LSRD, TXS,
XGDX
DES, INS, TSX
Cycles Cycle
#
1
2
Address Bus
R/W
Line
1
1
Data Bus
2
Opcode Address
Opcode Address + 1
Opcode
Irrelevant Data
2-2
3
1
2
3
1
2
3
1
Opcode Address
Opcode Address + 1
$FFFF
Opcode Address
Opcode Address + 1
Previous SP Value
Opcode Address
1
1
1
1
1
1
1
Opcode
Irrelevant Data
Irrelevant Data
Opcode
Irrelevant Data
Irrelevant Data
Opcode (Page Select Byte)
($18)
Opcode (Second Byte)
Irrelevant Data
Irrelevant Data
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($30)
Irrelevant Data
Irrelevant Data
Opcode
Irrelevant Data
Accumulator Data
Opcode ($3C)
Irrelevant Data
IXL (Low Byte) to Stack
IXH (High Byte) to Stack
Opcode (Page Select Byte)
($18)
Opcode (Second Byte) ($3C)
Irrelevant Data
IXL (Low Byte) to Stack
IXH (High Byte) to Stack
Opcode
Irrelevant Data
Irrelevant Data
Operand Data from Stack
Opcode ($38)
Irrelevant Data
Irrelevant Data
IXH (High Byte) from Stack
IXL (Low Byte) from Stack
2-3
3
2-4
ABY, DEY, INY,
TYS, XGDY
4
2
3
4
1
Opcode Address + 1
Opcode Address + 2
$FFFF
Opcode Address
1
1
1
1
2-5
TSY
4
2
3
4
1
2
3
1
2
3
4
1
Opcode Address + 1
Opcode Address + 2
Stack Pointer
Opcode Address
Opcode Address + 1
Stack Pointer
Opcode Address
Opcode Address + 1
Stack Pointer
Stack Pointer – 1
Opcode Address
1
1
1
1
1
0
1
1
0
0
1
2-6
PSHA, PSHB
3
2-7
PSHX
4
2-8
PSHY
5
2
3
4
5
1
2
3
4
1
2
3
4
5
Opcode Address + 1
Opcode Address + 2
Stack Pointer
Stack Pointer – 1
Opcode Address
Opcode Address + 1
Stack Pointer
Stack Pointer + 1
Opcode Address
Opcode Address + 1
Stack Pointer
Stack Pointer + 1
Stack Pointer + 2
1
1
0
0
1
1
1
1
1
1
1
1
1
2-9
PULA, PULB
4
2-10
PULX
5
* The reference number is given to provide a cross-reference to Table 10-1.
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