參數(shù)資料
型號: MC68HCP11A1CFN2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Single-Chip Microcontroller
中文描述: 8-BIT, 2 MHz, MICROCONTROLLER, PQCC52
封裝: PLASTIC, LCC-52
文件頁數(shù): 24/158頁
文件大小: 776K
代理商: MC68HCP11A1CFN2
MOTOROLA
2-8
SIGNAL DESCRIPTIONS AND OPERATING MODES
MC68HC11A8
TECHNICAL DATA
2
Figure 2-4 Address/Data Demultiplexing
2.2.3 Special Bootstrap Operating Mode
The bootstrap mode is considered a special operating mode as distinguished from the
normal single-chip operating mode. This is a very versatile operating mode since there
are essentially no limitations on the special purpose program that can be loaded into
the internal RAM. The boot loader program is contained in the 192 byte bootstrap
ROM. This ROM is enabled only if the MCU is reset in special bootstrap operating
mode, and appears as internal memory space at locations $BF40-$BFFF. The boot
loader program will use the SCI to read a 256 byte program into on-chip RAM at loca-
tions $0000-$00FF. After the character for address $00FF is received, control is auto-
matically passed to that program at location $0000.
The MC68HC11A8 communicates through the SCI port. After reset in special boot-
strap operating mode, the SCI is running at E clock/16 (7812 baud for E clock equal 2
MHz). If the security feature was specified and the security bit is set, $FF is output by
the SCI transmitter. The EEPROM is then erased. If erasure is unsuccessful, $FF is
output again and erasure is attempted again. Upon successful erasure of the EE-
PROM, all internal RAM is written over with $FF. The CONFIG register is then erased.
The boot loader program now proceeds as though the part had not been in security
mode.
HC373
MC68HC11A8
ADDR/DATA DEMUX
A13
A12
A11
A10
A9
A8
A14
A5
A4
A3
A2
A1
A0
A6
D5
D4
D3
D2
D1
D0
D6
D2
D3
D4
D5
D6
D7
D8
LE
D1
Q3
Q4
Q5
Q6
Q7
Q8
OE
Q2
PC5/A5/D5
PC4/A4/D4
PC3/A3/D3
PC2/A2/D2
PC1/A1/D1
PC0/A0/D0
PC6/A6/D6
AS
PB5/A13
PB4/A12
PB3/A11
PB2/A10
PB1/A9
PB0/A8
PB6/A14
R/W
E
WE
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