參數資料
型號: MC68HCL05P1ADW
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數: 41/124頁
文件大?。?/td> 3724K
代理商: MC68HCL05P1ADW
General Description
RESET
MC68HC05P1A Rev. 3.0
General Release Specification
General Description
NON-DISCLOSURE
AGREEMENT
REQUIRED
1.6 RESET
Driving this input low will reset the MCU to a known startup state. The
RESET pin contains an internal Schmitt trigger to improve its noise
immunity. Refer to Section 5. Resets.
1.6.1 PA0–PA7
These eight I/O pins comprise port A. The state of any pin is software
programmable, and all port A lines are configured as inputs during
power-on or reset. Eight individual mask options can be chosen to
enable pullups and interrupts (active low) on each port A pin. Refer to
1.6.2 PB5, PB6, and PB7
These three I/O pins comprise port B. The state of any pin is software
programmable and all port B lines are configured as inputs during
power-on or reset. Refer to Section 7. Input/Output Ports.
1.6.3 PC0–PC7
These eight I/O pins comprise port C. The state of any pin is software
programmable and all port C lines are configured as inputs during
power-on or reset. PC0 and PC1 are capable of sourcing and sinking
more current than a typical I/O pin. Refer to Section 7. Input/Output
1.6.4 PD5 and PD7/TCAP
These two pins comprise port D and are shared with the 16-bit timer
subsystem. The state of PD5 is software programmable and is
configured as an input during power-on or reset. PD7 is always an input.
It may be read at any time, regardless of the mode of operation of the
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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