參數(shù)資料
型號： MC68HCL05C8AB
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP42
封裝： SHRINK, PLASTIC, DIP-42
文件頁數(shù)： 120/166頁
文件大小： 1914K
代理商： MC68HCL05C8AB
Input/Output (I/O) Ports
Port C
MC68HC05C8A MC68HCL05C8A MC68HSC05C8A — Rev. 5.0
Technical Data
MOTOROLA
Input/Output (I/O) Ports
57
7.5 Port C
Port C is an 8-bit bidirectional port. The port C data register is at $0002
and the data direction register (DDR) is at $0006. Reset does not affect
the data registers, but clears the data direction registers, thereby
returning the ports to inputs. Writing a 1 to a DDR bit sets the
corresponding port bit to output mode. PC7 has a high current sink and
source capability.
7.6 Port D
Port D is a 7-bit fixed input port. Four of its pins are shared with the SPI
subsystem, two more are shared with the SCI subsystem. Reset does
not affect the data registers. During reset, all seven bits become valid
input ports because all special function output drivers associated with
the SCI, timer, and SPI subsystems are disabled.
7.7 Input/Output Programming
I/O port pins may be programmed as inputs or outputs under software
control. The direction of the pins is determined by the state of the
corresponding bit in the port data direction register (DDR). Each I/O port
has an associated DDR. Any I/O port pin is configured as an output if its
corresponding DDR bit is set to a logic 1. A pin is configured as an input
if its corresponding DDR bit is cleared to a logic 0.
At power-on or reset, all DDRs are cleared, which configures all I/O pins
as inputs. The data direction registers are capable of being written to or
read by the processor. During the programmed output state, a read of
the data register actually reads the value of the output data latch and not
the I/O pin. For further information, refer to Table 7-1 and Figure 7-2.
相關PDF資料
PDF描述
MC68HSC05C8CFB 8-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP44
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