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| 型號： | MC68HC901 |
| 廠商： | Motorola, Inc. |
| 英文描述： | Multi-Function Peripheral |
| 中文描述： | 多功能外設(shè) |
| 文件頁數(shù)： | 16/73頁 |
| 文件大?。?/td> | 274K |
| 代理商： | MC68HC901 |
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Signal Description
MOTOROLA
MC68HC901 USER’S MANUAL
2-3
2.7 INTERRUPT CONTROL
The interrupt request and interrupt acknowledge signals are handshake lines for a vectored
interrupt scheme. Interrupt enable in and interrupt enable out implement a daisy-chained
interrupt structure.
2.7.1 Interrupt Request (IRQ)
This active low, open-drain output signals to the processor that an interrupt is pending from
the MFP. There are 16 interrupt channels that can generate an interrupt request. Clearing
the interrupt pending registers (IPRA and IPRB) or clearing the interrupt mask registers
(IMRA and IMRB) will cause the IRQ to be negated. IRQ will also be negated as the result
of an interrupt acknowledge cycle, unless additional interrupts are pending in the MFP.
Refer to
Section 4 Interrupt Structure
for further information.
2.7.2 Interrupt Acknowledge (IACK)
If both IRQ and IEI are asserted, the MFP will begin an interrupt acknowledge cycle when
IACK and DS are asserted. The MFP will supply a unique vector number to the processor
which corresponds to the particular channel requesting interrupt service. In a daisy-chained
interrupt structure, all devices in the chain must have a common IACK. Refer to
Interrupt Acknowledge Operation
and
Section 4.1.2 Interrupt Vector Number
additional information. CS and IACK must not be asserted at the same time.
Section 3.2
for
2.7.3 Interrupt Enable In (IEI)
This active low input, together with the IEO signal, provides a daisy-chained interrupt
structure for a vectored interrupt scheme. IEI indicates that no higher priority device is
requesting interrupt service. So, the highest priority MFP in the chain should have its IEI pin
tied low. During an interrupt acknowledge cycle, a MFP with a pending interrupt is not
allowed to pass a vector number to the processor until its IEI pin is asserted. When the
daisy-chain option is not implemented, all MFPs should have their IEI pin tied low. Refer to
Section 4.2 Daisy-Chaining MFPs
for additional information.
2.7.4 Interrupt Enable Out (IEO)
This active low output, together with the IEI signal, provides a daisy-chained interrupt
structure for a vectored interrupt scheme. The IEO of a particular MFP signals lower priority
devices that neither it nor any other higher priority device is requesting interrupt service.
When a daisy-chain is implemented, IEO is tied to the next lower priority MFP IEI input. The
lowest priority MFP is not connected. When the daisy-chain option is not implemented, IEO
is not connected. Refer to
Section 4.2 Daisy-Chaining MFPs
for additional information.
2.8 GENERAL PURPOSE I/O INTERRUPT LINES (I7–I0)
These lines constitute an 8-bit pin-programmable I/O port with interrupt capability. The data
direction register (DDR) individually defines each line as either a high-impedance input or a
TTL-compatible output. As an input, each line can generate an interrupt on the user selected
transition of the input signal. Refer to
Section 5 General Purpose Input/Output Port
further information.
for
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