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| 型號： | MC68HC705P6ACP |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 50/98頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 2.1MHZ 4.5K OTP 28-DIP |
| 標準包裝： | 13 |
| 系列： | HC05 |
| 核心處理器： | HC05 |
| 芯體尺寸： | 8-位 |
| 速度： | 2.1MHz |
| 連通性： | SIO |
| 外圍設(shè)備： | POR，WDT |
| 輸入/輸出數(shù)： | 21 |
| 程序存儲器容量： | 4.5KB（4.5K x 8） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 176 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 4x8b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-DIP（0.600"，15.24mm） |
| 包裝： | 管件 |
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Analog Subsystem
MC68HC705P6A Advance Information Data Sheet, Rev. 2.1
54
Freescale Semiconductor
9.4.1 Conversion Times
Each input conversion requires 32 internal clock cycles, which must be at a frequency equal to or greater
than 1 MHz.
9.4.2 Internal versus External Oscillator
If the internal clock is 1 MHz or greater (i.e., external oscillator 2 MHz or greater), the internal RC oscillator
must be turned off and the external oscillator used as the conversion clock.
If the MCU internal clock frequency is less than 1 MHz (2 MHz external oscillator), the internal RC
oscillator (approximately 1.5 MHz) must be used for the A/D converter clock. The internal RC clock is
selected by setting the ADRC bit in the ADSC register.
When the internal RC oscillator is being used, these limitations apply:
1.
Since the internal RC oscillator is running asynchronously with respect to the internal clock, the
conversion complete bit (CC) in register ADSC must be used to determine when a conversion
sequence has been completed.
2.
Electrical noise will slightly degrade the accuracy of the A/D converter. The A/D converter is
synchronized to read voltages during the quiet period of the clock driving it. Since the internal and
external clocks are not synchronized, the A/D converter will occasionally measure an input when
the external clock is making a transition.
9.4.3 Multi-Channel Operation
An input multiplexer allows the A/D converter to select from one of four external analog signals. Port C
pins PC3 through PC6 are shared with the inputs to the multiplexer.
9.5 A/D Status and Control Register (ADSC)
The ADSC register reports the completion of A/D conversion and provides control over oscillator
selection, analog subsystem power, and input channel selection. See Figure 9-1.
CC — Conversion Complete
This read-only status bit is set when a conversion sequence has completed and data is ready to be
read from the ADC register. CC is cleared when the ADSC is written to or when data is read from the
ADC register. Once a conversion has been started, conversions of the selected channel will continue
every 32 internal clock cycles until the ADSC register is written to again. During continuous conversion
operation, the ADC register will be updated with new data, and the CC bit set every 32 internal clock
cycles. Also, data from the previous conversion will be overwritten regardless of the state of the CC bit.
Address: $001E
Bit 7
654321
Bit 0
Read:
CC
ADRC
ADON
00
CH2
CH1
CH0
Write:
Reset:
00000000
= Unimplemented
Figure 9-1. A/D Status and Control Register (ADSC)
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| MC68HC705P6ADW | 制造商:Rochester Electronics LLC 功能描述:MCU, 176 BYTES RAM, A/D - Bulk |
| MC68HC705P6AMDW | 功能描述:IC MCU 4.6K OTP 2.1MHZ 28-SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 標準包裝:250 系列:56F8xxx 核心處理器:56800E 芯體尺寸:16-位 速度:60MHz 連通性:CAN，SCI，SPI 外圍設(shè)備:POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):21 程序存儲器容量:40KB（20K x 16） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:6K x 16 電壓 - 電源 (Vcc/Vdd):2.25 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 6x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:48-LQFP 包裝:托盤 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323 |
| MC68HC705P6AMP | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC68HC705P6CDW | 制造商:Motorola Inc 功能描述: |
| MC68HC705P6CP | 制造商:Freescale Semiconductor 功能描述: 制造商:Motorola Inc 功能描述: |
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