- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45237 > MC68HC705KJ1CS (FREESCALE SEMICONDUCTOR INC) 8-BIT, UVPROM, 4 MHz, MICROCONTROLLER, CDIP16 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68HC705KJ1CS |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, UVPROM, 4 MHz, MICROCONTROLLER, CDIP16 |
| 封裝： | WINDOWED, CERDIP-16 |
| 文件頁數(shù)： | 80/108頁 |
| 文件大?。?/td> | 719K |
| 代理商： | MC68HC705KJ1CS |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁當(dāng)前第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁
Interrupts
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
73
8.2.3 COP Watchdog Reset
A timeout of the COP watchdog generates a COP reset. The COP watchdog is part of a software error
detection system and must be cleared periodically to start a new timeout period. To clear the COP
watchdog and prevent a COP reset, write a logic 0 to bit 0 (COPC) of the COP register at location $07F0.
8.2.4 Illegal Address Reset
An opcode fetch from an address not in RAM or EPROM generates a reset.
8.3 Interrupts
The following sources can generate interrupts:
SWI instruction
External interrupt pins
–IRQ/VPP pin
–
PA0–PA3 pins
Timer
–
Real-time interrupt flag (RTIF)
–
Timer overflow flag (TOF)
An interrupt temporarily stops the program sequence to process a particular event. An interrupt does not
stop the operation of the instruction being executed, but takes effect when the current instruction
completes its execution. Interrupt processing automatically saves the CPU registers on the stack and
loads the program counter with a user-defined interrupt vector address.
8.3.1 Software Interrupt
The software interrupt (SWI) instruction causes a non-maskable interrupt.
8.3.2 External Interrupt
An interrupt signal on the IRQ/VPP pin latches an external interrupt request. When the CPU completes its
current instruction, it tests the IRQ latch. If the IRQ latch is set, the CPU then tests the I bit in the condition
code register. If the I bit is clear, the CPU then begins the interrupt sequence.
The CPU clears the IRQ latch during interrupt processing, so that another interrupt signal on the IRQ/VPP
pin can latch another interrupt request during the interrupt service routine. As soon as the I bit is cleared
during the return from interrupt, the CPU can recognize the new interrupt request. Figure 8-4 shows the
IRQ/VPP pin interrupt logic.
Setting the I bit in the condition code register disables external interrupts.
The port A external interrupt bit (PIRQ) in the mask option register enables pins PA0–PA3 to function as
external interrupt pins.
The external interrupt sensitivity bit (LEVEL) in the mask option register controls interrupt triggering
sensitivity of external interrupt pins. The IRQ/VPP pin can be negative-edge triggered only or
negative-edge and low-level triggered. Port A external interrupt pins can be positive-edge triggered only
or both positive-edge and high-level triggered. The level-sensitive triggering option allows multiple
external interrupt sources to be wire-ORed to an external interrupt pin. An external interrupt request,
shown in Figure 8-5, is latched as long as any source is holding an external interrupt pin low.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HRC705KJ1CS | 8-BIT, UVPROM, 4 MHz, MICROCONTROLLER, CDIP16 |
| MC68HLC705KJ1CP | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDIP16 |
| MC68HRC705KJ1CP | 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PDIP16 |
| MC68HC705L1B | 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP56 |
| MC68HC05L1FU | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC705L32FU | 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述: |
| MC68HC705L5FUE | 功能描述:8位微控制器 -MCU 705L5-EPP-80QFP-6019 RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MC68HC705MC4CDW | 制造商:Motorola 功能描述:MOTOROLA S7D9B |
| MC68HC705P6ACDW | 功能描述:8位微控制器 -MCU 8 Bit 2.1MHz RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時(shí)鐘頻率:50 MHz 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MC68HC705P6ACP | 功能描述:IC MCU 2.1MHZ 4.5K OTP 28-DIP RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC05 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。