參數(shù)資料
型號: MC68HC705JJ7CP
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 93/164頁
文件大小: 1165K
代理商: MC68HC705JJ7CP
Interrupts
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
34
Freescale Semiconductor
4.3 Interrupt Processing
To begin servicing an interrupt, the CPU does these actions:
Stores the CPU registers on the stack in the order shown in Figure 4-1
Sets the I bit in the condition code register to prevent further interrupts
Loads the program counter with the contents of the appropriate interrupt vector locations as shown
The return-from-interrupt (RTI) instruction causes the CPU to recover its register contents from the stack
as shown in Figure 4-1. The sequence of events caused by an interrupt is shown in the flowchart in
$0020
Bottom of RAM
$0021
$00BE
$00BF
$00C0
Bottom of Stack
$00C1
$00C2
Unstacking
Order
?
n
Condition Code Register
5
1
n+1
Accumulator
4
2
n+2
Index Register
3
n+3
Program Counter (High Byte)
2
4
n+4
Program Counter (Low Byte)
1
5
Stacking
Order
$00FD
$00FE
$00FF
Top of Stack (RAM)
Figure 4-1. Interrupt Stacking Order
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相關代理商/技術參數(shù)
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