參數(shù)資料
型號(hào)： MC68HC705JJ7CP
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP20
封裝： PLASTIC, DIP-20
文件頁數(shù)： 90/164頁
文件大?。?/td> 1165K
代理商： MC68HC705JJ7CP
Condition Code Register
MC68HC705JJ7 MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
Freescale Semiconductor
31
3.6 Condition Code Register
The condition code register is an 8-bit register whose three most significant bits are permanently fixed at
111 as shown in Figure 3-6. The condition code register contains the interrupt mask and four flags that
indicate the results of the instruction just executed. The following paragraphs describe the functions of the
condition code register.
Half-Carry Flag (H)
The CPU sets the half-carry flag when a carry occurs between bits 3 and 4 of the accumulator during
an ADD or ADC operation. The half-carry flag is required for binary coded decimal (BCD) arithmetic
operations. Reset has no effect on the half-carry flag.
Interrupt Mask (I)
Setting the interrupt mask disables interrupts. If an interrupt request occurs while the interrupt mask is
a logic 0, the CPU saves the CPU registers on the stack, sets the interrupt mask, and then fetches the
interrupt vector. If an interrupt request occurs while the interrupt mask is set, the interrupt request is
latched. The CPU processes the latched interrupt as soon as the interrupt mask is cleared again.
A return-from-interrupt (RTI) instruction pulls the CPU registers from the stack, restoring the interrupt
mask to its cleared state. After a reset, the interrupt mask is set and can be cleared only by a CLI
instruction.
Negative Flag (N)
The CPU sets the negative flag when an arithmetic operation, logical operation, or data manipulation
produces a negative result. Reset has no affect on the negative flag.
Zero Flag (Z)
The CPU sets the zero flag when an arithmetic operation, logical operation, or data manipulation
produces a result of $00. Reset has no affect on the zero flag.
Carry/Borrow Flag (C)
The CPU sets the carry/borrow flag when an addition operation produces a carry out of bit 7 of the
accumulator or when a subtraction operation requires a borrow. Some logical operations and data
manipulation instructions also clear or set the carry/borrow flag. Reset has no effect on the
carry/borrow flag.
3.7 Arithmetic/Logic Unit (ALU)
The ALU performs the arithmetic and logical operations defined by the instruction set. The binary
arithmetic circuits decode instructions and set up the ALU for the selected operation. Most binary
arithmetic is based on the addition algorithm, carrying out subtraction as negative addition. Multiplication
is not performed as a discrete operation but as a chain of addition and shift operations within the ALU.
The multiply instruction (MUL) requires 11 internal clock cycles to complete this chain of operations.
Bit 7
654321
Bit 0
Read:
111
H
I
N
C
Z
Write:
Reset:
111
U
1
U
U = Unaffected
Figure 3-6. Condition Code Register (CCR)
相關(guān)PDF資料
PDF描述
MC68HC705JJ7S 8-BIT, UVPROM, 2.1 MHz, MICROCONTROLLER, CDIP20
MC68HC705K1DWR2 8-BIT, OTPROM, MICROCONTROLLER, PDSO16
MC68HC705K1CP 8-BIT, OTPROM, MICROCONTROLLER, PDIP16
MC68HC705K1P 8-BIT, OTPROM, 2 MHz, MICROCONTROLLER, PDIP16
MC68HC705K1DW 8-BIT, OTPROM, MICROCONTROLLER, PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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MC68HC705JP7CP 制造商:Rochester Electronics LLC 功能描述: 制造商:Freescale Semiconductor 功能描述:
MC68HC705K1CDW 制造商:Motorola Inc 功能描述:
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