參數(shù)資料
型號(hào): MC68HC705J2DW
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS MICROCONTROLLER UNIT
中文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝: SOIC-20
文件頁數(shù): 61/82頁
文件大?。?/td> 327K
代理商: MC68HC705J2DW
MC68HC705J2
Rev. 2
INSTRUCTION SET
MOTOROLA
10-9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
BHCC rel
Branch if Half-Carry
Bit Clear
Branch if Half-Carry
Bit Set
Branch if Higher
Branch if Higher or
Same
Branch if IRQ Pin
High
Branch if IRQ Pin
Low
PC
(PC) + 2 + rel H = 0
— — — — —
REL
28
rr
3
BHCS rel
PC
(PC) + 2 + rel H = 1
— — — — —
REL
29
rr
3
BHI rel
PC
(PC) + 2 + rel C
Z = 0
— — — — —
REL
22
rr
3
BHS rel
PC
(PC) + 2 + rel C = 0
— — — — —
REL
24
rr
3
BIH rel
PC
(PC) + 2 + rel IRQ = 1
— — — — —
REL
2F
rr
3
BIL rel
PC
(PC) + 2 + rel IRQ = 0
— — — — —
REL
2E
rr
3
BIT #opr
BIT opr
BIT opr
BIT oprX
BIT oprX
BIT ,X
Bit Test
Accumulator with
Memory Byte
(A)
(M)
— —
¤
¤
IMM
DIR
EXT
IX2
IX1
IX
A5
B5
C5
D5
E5
F5
ii
dd
hh ll
ee ff
ff
p
2
3
4
5
4
3
BLO rel
Branch if Lower
(Same as BCS)
Branch if Lower or
Same
Branch if Interrupt
Mask Clear
Branch if Minus
Branch if Interrupt
Mask Set
Branch if Not Equal
Branch if Plus
Branch Always
PC
(PC) + 2 + rel C = 1
— — — — —
REL
25
rr
3
BLS rel
PC
(PC) + 2 + rel C
Z = 1
— — — — —
REL
23
rr
3
BMC rel
PC
(PC) + 2 + rel I = 0
— — — — —
REL
2C
rr
3
BMI rel
PC
(PC) + 2 + rel N = 1
— — — — —
REL
2B
rr
3
BMS rel
PC
(PC) + 2 + rel I = 1
— — — — —
REL
2D
rr
3
BNE rel
BPL rel
BRA rel
PC
(PC) + 2 + rel Z = 0
PC
(PC) + 2 + rel N = 0
PC
(PC) + 2 + rel 1 = 1
— — — — —
— — — — —
— — — — —
REL
REL
REL
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
DIR (b0)
DIR (b1)
DIR (b2)
DIR (b3)
DIR (b4)
DIR (b5)
DIR (b6)
DIR (b7)
REL
26
2A
20
01
03
05
07
09
0B
0D
0F
00
02
04
06
08
0A
0C
0E
21
rr
rr
rr
3
3
3
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
BRCLR n opr rel Branch if bit n clear
PC
(PC) + 2 + rel Mn = 0
— — — —
¤
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
dd rr
rr
BRSET n opr rel Branch if Bit n Set
PC
(PC) + 2 + rel Mn = 1
— — — —
¤
BRN rel
Branch Never
PC
(PC) + 2 + rel 1 = 0
— — — — —
3
Table 10-6. Instruction Set Summary (Continued)
Source
Form
Operation
Description
Effect on
CCR
A
M
O
O
C
H I N Z C
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