參數(shù)資料
型號(hào)： MC68HC705J2DW
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： HCMOS MICROCONTROLLER UNIT
中文描述： 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDSO20
封裝： SOIC-20
文件頁(yè)數(shù)： 50/82頁(yè)
文件大小： 327K
代理商： MC68HC705J2DW
MOTOROLA
8-4
BOOTLOADER MODE
MC68HC705J2
Rev. 2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
8.3 Mask Option Register (MOR)
The mask option register is an EPROM byte that contains three bits to control the
following options:
MC68HC05J1 emulation mode
External interrupt trigger sensitivity
COP timer (enable/disable)
The mask option register is programmable only when using the bootloader function
to download to the EPROM.
Figure 8-2. Mask Option Register (MOR)
J1 — MC68HC05J1 Emulation Mode Select
This bit can be read at any time, but can be programmed only by the bootloader.
1 = Emulation mode selected; MCU functions as MC68HC05J1
0 = (Erased state) MC68HC705J2 native mode selected
IRQ — Interrupt Request
This bit can be read at any time, but can be programmed only by the bootloader.
1 = IRQ trigger is both edge-sensitive and level-sensitive
0 = (Erased state) IRQ trigger is edge-sensitive only
COP — COP Timer Enable
This bit can be read at any time, but can be programmed only by the bootloader.
1 = COP timer enabled
0 = (Erased state) COP timer disabled
NOTE
To avoid unintentionally enabling any of the options in the MOR, the
user should ensure that location $0F00 of the 8K external EPROM
(2764) is programmed with either the appropriate value for the
options to be enabled or $00. This is necessary because the erased
state of an 8K external EPROM is $FF, whereas the erased state of
the MOR is $00.
MOR
— Mask Option Register
$0F00
MC68HC05J1 Emulation Mode:
$0700
Bit 7
—
6
—
5
—
4
—
3
—
2
J1
1
Bit 0
COP
IRQ
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