參數(shù)資料
型號: MC68HC705J1ACP
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: Microcontrollers
中文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP20
封裝: PLASTIC, DIP-20
文件頁數(shù): 64/108頁
文件大小: 718K
代理商: MC68HC705J1ACP
Parallel I/O Ports (PORTS)
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
64
Freescale Semiconductor
7.2 Port A
Port A is an 8-bit bidirectional port.
7.2.1 Port A Data Register
The port A data register contains a latch for each port A pin.
PA[7:0] — Port A Data Bits
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
7.2.2 Data Direction Register A
Data direction register A determines whether each port A pin is an input or an output.
DDRA[7:0] — Data Direction Register A Bits
These read/write bits control port A data direction. Reset clears DDRA[7:0], configuring all port A pins
as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
NOTE
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 7-4
shows the I/O logic of port A.
Address:
$0000
Bit 7
6
5
4
3
2
1
Bit 0
Read:
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PA0
Write:
Reset:
Unaffected by reset
Figure 7-2. Port A Data Register (PORTA)
Address:
$0004
Bit 7
6
5
4
3
2
1
Bit 0
Read:
DDRA7
DDRA6
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
Write:
Reset:
0
0
0
0
0
0
0
0
Figure 7-3. Data Direction Register A (DDRA)
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