參數(shù)資料
型號: MC68HC705C8ACP
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Microcontroller Unit
中文描述: 8-BIT, OTPROM, 2.1 MHz, MICROCONTROLLER, PDIP40
封裝: PLASTIC, DIP-40
文件頁數(shù): 47/108頁
文件大小: 718K
代理商: MC68HC705C8ACP
Instruction Set
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
47
RTI
Return from Interrupt
SP
(SP) + 1; Pull (CCR)
SP
(SP) + 1; Pull (A)
SP
(SP) + 1; Pull (X)
SP
(SP) + 1; Pull (PCH)
SP
(SP) + 1; Pull (PCL)
SP
(SP) + 1; Pull (PCH)
SP
(SP) + 1; Pull (PCL)
INH
80
9
RTS
Return from Subroutine
— — — — —
INH
81
6
SBC #
opr
SBC
opr
SBC
opr
SBC
opr
,X
SBC
opr
,X
SBC ,X
Subtract Memory Byte and Carry Bit from
Accumulator
A
(A) – (M) – (C)
— —
IMM
DIR
EXT
IX2
IX1
IX
A2
B2
C2
D2
E2
F2
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
SEC
Set Carry Bit
C
1
— — — — 1
INH
99
2
SEI
Set Interrupt Mask
I
1
— 1 — — —
INH
9B
2
STA
opr
STA
opr
STA
opr
,X
STA
opr
,X
STA ,X
Store Accumulator in Memory
M
(A)
— —
DIR
EXT
IX2
IX1
IX
B7
C7
D7
E7
F7
dd
hh ll
ee ff
ff
4
5
6
5
4
STOP
Stop Oscillator and Enable IRQ Pin
— 0 — — —
INH
8E
2
STX
opr
STX
opr
STX
opr
,X
STX
opr
,X
STX ,X
Store Index Register In Memory
M
(X)
— —
DIR
EXT
IX2
IX1
IX
BF
CF
DF
EF
FF
dd
hh ll
ee ff
ff
4
5
6
5
4
SUB #
opr
SUB
opr
SUB
opr
SUB
opr
,X
SUB
opr
,X
SUB ,X
Subtract Memory Byte from Accumulator
A
(A) – (M)
— —
IMM
DIR
EXT
IX2
IX1
IX
A0
B0
C0
D0
E0
F0
ii
dd
hh ll
ee ff
ff
2
3
4
5
4
3
SWI
Software Interrupt
PC
(PC) + 1; Push (PCL)
SP
(SP) – 1; Push (PCH)
SP
(SP) – 1; Push (X)
SP
(SP) – 1; Push (A)
SP
(SP) – 1; Push (CCR)
SP
(SP) – 1; I
1
PCH
Interrupt Vector High Byte
PCL
Interrupt Vector Low Byte
— 1 — — —
INH
83
1
0
TAX
Transfer Accumulator to Index Register
X
(A)
— — — — —
INH
97
2
TST
opr
TSTA
TSTX
TST
opr
,X
TST ,X
Test Memory Byte for Negative or Zero
(M) – $00
— —
DIR
INH
INH
IX1
IX
3D
4D
5D
6D
7D
dd
ff
4
3
3
5
4
Table 4-6. Instruction Set Summary (Sheet 5 of 6)
Source
Form
Operation
Description
Effect
on CCR
A
M
O
O
C
H I N Z C
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