
MOTOROLA
ELECTRICAL CHARACTERISTICS
MC68HC58
A-10
TECHNICAL DATA
NOTES:
1. The receiver symbol timing boundaries are subject to an uncertainty of
± 1s due to sampling considerations.
Table A-8 Transceiver Requirements (DC)
Symbol
Description
Conditions
Min
Max
Units
V
OH
Guaranteed output high
voltage
100% bus utilization, 4 MHz
(VBATT = 9 to 26.5V)
6.25
8.0
V
100% bus utilization, 4 MHz
(VBATT = 7 to 9V)
5.25
8.0
V
OL, MAX
Maximum guaranteed
output low voltage
100% bus utilization, 4 MHz
—
1.5
V
IL, MAX
Maximum input low
voltage
V
CC
= 4.75 to 5.25 V
—
3.5
V
IH, MIN
Minimum input high
voltage
V
CC
= 4.75 to 5.25 V
4.25
—
V
VT
Nominal receiver trip
point
–
3.875
—
V
Table A-9 Transmitter VPW Symbol Timings
(VBATT = 12V, VCC = 5.0V, VSS = 0V, TA = 25°C, unless otherwise noted.)
Characteristic
Number
Symbol
Min
Typical
Max
Unit
Passive logic 0
10
tTVP1
58.0
64.0
70.0
s
Passive logic 1
11
tTVP2
122.0
128.0
134.0
s
Active logic 0
12
tTVA1
122.0
128.0
134.0
s
Active logic 1
13
tTVA2
58.0
64.0
70.0
s
Start of frame (SOF)
14
tTVA3
193.0
200.00
207.0
s
End of data (EOD)
15
tTVP3
193.0
200.0
207.0
s
End of frame
16
tTV4
271.0
280.0
289.0
s
Inter-frame separator (IFS)
17
tTV6
300.0
—
s
Break (BRK)
18
tTV7
—
1200
—
s
Table A-10 Receiver VPW Symbol Timings
(VBATT = 12V, VCC = 5.0V, VSS = 0V, TA = 25°C, unless otherwise noted.)
Characteristic
Number
Symbol1
Min
Typical
Max
Unit
Passive logic 0
10
tRVP1
34.0
64.0
96.0
s
Passive logic 1
11
tRVP2
96.0
128.0
163.0
s
Active logic 0
12
tRVA1
96.0
128.0
163.0
s
Active logic 1
13
tRVA2
34.0
64.0
96.0
s
Start of frame (SOF)
14
tRVA3
163.0
200.0
239.0
s
End of data (EOD)
15
tRVP3
163.0
200.0
239.0
s
End of frame
16
tRV4
239.0
280.0
320.0
s
Break
18
tRV7
768.0
–
s