參數(shù)資料
型號(hào): MC68HC16S2CPU20
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, 20.97 MHz, MICROCONTROLLER, PQFP100
封裝: TQFP-100
文件頁數(shù): 30/104頁
文件大?。?/td> 640K
代理商: MC68HC16S2CPU20
MC68HC16S2
MOTOROLA
MC68HC16S2TS/D
31
CSPAR0 contains seven 2-bit fields that determine the functions of corresponding chip-select pins.
CSPAR0[15:14] are not used. These bits always read zero; writes have no effect. CSPAR0 bit 1 always
reads one; writes to CSPAR0 bit 1 have no effect. Table 20 shows CSPAR0 pin assignments.
The reset state of DATA[7:3] determines whether pins controlled by CSPAR1 are initially configured as
high-order address lines or chip-selects. Table 21 shows the correspondence between DATA[7:3] and
the reset configuration of CS[10:6]/ADDR[23:19].
NOTES:
1. Refer to Table 21 for CSPAR1 reset state information.
CSPAR0 — Chip-Select Pin Assignment Register 0
$YFFA44
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CS5PA[1:0]
CS4PA[1:0]
CS3PA[1:0]
CS2PA[1:0]
CS1PA[1:0]
CS0PA[1:0]
CSBTPA[1:0]
RESET:
0
DATA2
1
DATA2
1
DATA2
1
DATA1
1
DATA1
1
DATA1
1
DATA0
Table 20 CSPAR0 Pin Assignments
CSPAR0 Field
Chip-Select Signal
Alternate Signal
Discrete Output
CS5PA[1:0]
CS5
FC2
PC2
CS4PA[1:0]
CS4
FC1
PC1
CS3PA[1:0]
CS3
FC0
PC0
CS2PA[1:0]
CS2
BGACK
CS1PA[1:0]
CS1
BG
CS0PA[1:0]
CS0
BR
CSBTPA[1:0]
CSBOOT
——
CSPAR1 — Chip-Select Pin Assignment Register 1
$YFFA46
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CS10PA[1:0]
CS9PA[1:0]
CS8PA[1:0]
CS7PA[1:0]
CS6PA[1:0]
RESET:
0
DATA71
1
DATA
1
DATA
[7:5]1
1
DATA
1
DATA
[7:3]1
1
Table 21 Reset Pin Function of CS[10:6]
Data Bus Pins at Reset
Chip-Select/Address Bus Pin Function
DATA7
DATA6
DATA5
DATA4
DATA3
CS10/
ADDR23
CS9/
ADDR22
CS8/
ADDR21
CS7/
ADDR20
CS8/
ADDR19
11111
CS10
CS9
CS8
CS7
CS6
1111
0
CS10
CS9
CS8
CS7
ADDR19
111
0
X
CS10
CS9
CS8
ADDR20 ADDR19
11
0
X
CS10
CS9
ADDR21 ADDR20 ADDR19
1
0
X
CS10
ADDR22 ADDR21 ADDR20 ADDR19
0
XXXX
ADDR23 ADDR22 ADDR21 ADDR20 ADDR19
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