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參數(shù)資料
| 型號(hào)： | MC68HC11K0VFU3 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT MICROCONTROLLER |
| 中文描述： | 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | QFP-80 |
| 文件頁(yè)數(shù)： | 31/80頁(yè) |
| 文件大?。?/td> | 420K |
| 代理商： | MC68HC11K0VFU3 |
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M68HC11 K Series
MC68HC11KTS/D
MOTOROLA
31
4.3.1 Program Chip Select (CSPROG)
The program chip select (CSPROG) is active in the range of memory where the main program exists.
CSPROG is enabled out of reset in all modes. After reset in normal mode, the PCS stretch select bit is
set to provide one cycle of stretch so that slow memory devices can be used.
4.3.2 I/O Chip Select (CSIO)
The I/O chip select (CSIO) is programmable for a four Kbyte size located at addresses $1000 to $1FFF
or eight Kbyte size located at addresses $0000 to $1FFF. Polarity of the active state is programmable
for active high or active low. Clock stretching can be set from zero to three cycles.
CSIO
Enable
Valid
Polarity
Size
Start Address
Stretch
IOEN in CSCTL —1 = On, off at reset (0)
IOCSA in CSCTL —1 = Address valid, 0 = E valid
IOPL in CSCTL —1 = Active high, 0 = Active low
IOSZ in CSCTL —1 = 4K ($1000–$1FFF), 0 = 8K ($0000–$1FFF)
Fixed (see Size)
IO1SA:IO1SB in CSCSTR —0, 1, 2, or 3 E clocks
CSPROG
Enable
Valid
Polarity
Size
PSCEN in CSCTL —1 = On, ON at reset
Fixed (Address valid)
Fixed (Active low)
PCSZA:PCSZB in CSCTL —
0:0 = 64K ($0000–$FFFF)
0:1 = 32K ($8000–$FFFF)
1:0 = 16K ($C000–$FFFF)
1:1 = 8K ($E000–$FFFF)
Start Address
Stretch
Priority
Fixed (see Size)
PCSA:PCSB in CSCSTR —0, 1, 2, or 3 E clocks
GCSPR in CSCTL —
1 = CSGPx above CSPROG
0 = CSPROG above CSGPx
CSGP1,
CSGP2
Enable
Valid
Polarity
Size
Set size to 0K to disable
GxPOL in GPCS1C (GPCS2C) —1 = Address valid, 0 = E valid
GxAV in GPCS1C (GPCS2C) —1 = Active high, 0 = Active low
Refer to GPCS1C (GPCS2C) —2K to 512K in nine steps, 0K = dis-
able, can also follow memory expansion window 1 or window 2
Refer to GPCS1A (GPCS2A)
Refer to CSCSTR —0, 1, 2, or 3 E clocks
G1DG2 in GPCS1C allows CSGP1 and CSGP2 to be connected to
an internal OR gate and driven out the CSGP2 pin.
Start Address
Stretch
Other
G1DPC in GPCS1C allows CSGP1 and CSPROG to be connected to
an internal OR gate and driven out the CSPROG pin.
G2DPC in GPCS2C allows CSGP2 and CSPROG to be connected to
an internal OR gate and driven out the CSPROG pin.
MXGS2 in MMSIZ allows CSGP2 to follow either 64K CPU addresses
or 512K expansion addresses.
MXGS1 in MMSIZ allows CSGP1 to follow either 64K CPU addresses
or 512K expansion addresses.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC11K0VFU4 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-Bit Microcontroller |
| MC68HC11K1 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC11K1CFN2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:8-Bit Microcontroller |
| MC68HC11K1CFN3 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS MICROCONTROLLER UNIT |
| MC68HC11K1CFN4 | 功能描述:IC MCU 640 EEPROM 4MHZ 84-PLCC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:HC11 其它有關(guān)文件:STM32F101T8 View All Specifications 特色產(chǎn)品:STM32 32-bit Cortex MCUs 標(biāo)準(zhǔn)包裝:490 系列:STM32 F1 核心處理器:ARM? Cortex?-M3 芯體尺寸:32-位 速度:36MHz 連通性:I²C，IrDA，LIN，SPI，UART/USART 外圍設(shè)備:DMA，PDR，POR，PVD，PWM，溫度傳感器，WDT 輸入/輸出數(shù):26 程序存儲(chǔ)器容量:64KB（64K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:10K x 8 電壓 - 電源 (Vcc/Vdd):2 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 10x12b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:36-VFQFN，36-VFQFPN 包裝:托盤 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名稱:497-9032STM32F101T8U6-ND |
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