參數(shù)資料
型號(hào): MC68HC11K0VFU3
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT MICROCONTROLLER
中文描述: 8-BIT, MROM, 3 MHz, MICROCONTROLLER, PQFP80
封裝: QFP-80
文件頁(yè)數(shù): 16/80頁(yè)
文件大?。?/td> 420K
代理商: MC68HC11K0VFU3
MOTOROLA
16
M68HC11 K Series
MC6HC11KTS/D
$0015
$0016
$0017
$0018
$0019
$001A
$001B
$001C
$001D
$001E
$001F
$0020
$0021
$0022
$0023
$0024
$0025
$0026
$0027
$0028
$0029
$002A
$002B
$002C
$002D
$002E
$002F
$0030
$0031
$0032
$0033
$0034
$0035
$0036
$0037
$0038
$0039
$003A
$003B
$003C
$003D
$003E
$003F
$0040
to
$0055
$0056
$0057
Bit 7
Bit 15
Bit 7
Bit 15
Bit 7
Bit 15
Bit 7
Bit 15
Bit 7
Bit 15
Bit 7
OM2
EDG4B
OC1I
OC1F
TOI
TOF
0
Bit 7
SPIE
SPIF
Bit 7
MBE
0
0
6
5
4
3
2
1
9
1
9
1
9
1
9
1
9
1
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
OL5
EDG3A
IC3I
IC3F
PR0
0
RTR0
Bit 0
SPR0
Bit 0
Bit 0
EPGM
BPPUE
PGAR0
TIC3 (Low)
TOC1(High)
TOC1 (Low)
TOC2 (High)
TOC2 (Low)
TOC3 (High)
TOC3 (Low)
TOC4 (High)
TOC4 (Low)
TI4/O5 (High)
TI4/O5 (Low)
TCTL1
TCTL2
TMSK1
TFLG1
TMSK2
TFLG2
PACTL
PACNT
SPCR
SPSR
SPDR
EPROG*
PPAR
PGAR
Reserved
Reserved
ADCTL
ADR1
ADR2
ADR3
ADR4
BPROT
Reserved
INIT2
OPT2
OPTION
COPRST
PPROG
HPRIO
INIT
TEST1
CONFIG
Reserved
14
6
14
6
14
6
14
6
14
6
OL2
EDG4A
OC2I
OC2F
RTII
RTIF
PAEN
6
SPE
WCOL
6
0
0
0
13
5
13
5
13
5
13
5
13
5
OM3
EDG1B
OC3I
OC3F
PAOVI
PAOVF
PAMOD
5
DWOM
0
5
ELAT
0
PGAR5
12
4
12
4
12
4
12
4
12
4
OL3
EDG1A
OC4I
OC4F
PAII
PAIF
PEDGE
4
MSTR
MODF
4
EXCOL
0
PGAR4
11
3
11
3
11
3
11
3
11
3
OM4
EDG2B
I4/O5I
I4/O5F
0
0
0
3
CPOL
0
3
EXROW
HPPUE
PGAR3
10
2
10
2
10
2
10
2
10
2
OL4
EDG2A
IC1I
IC1F
0
0
I4/O5
2
CPHA
0
2
T1
GPPUE
PGAR2
OM5
EDG3B
IC2I
IC2F
PR1
0
RTR1
1
SPR1
0
1
T0
FPPUE
PGAR1
CCF
Bit 7
Bit 7
Bit 7
Bit 7
BULKP
0
6
6
6
6
SCAN
5
5
5
5
BPRT4
MULT
4
4
4
4
PTCON
CD
3
3
3
3
CC
2
2
2
2
CB
1
1
1
1
CA
Bit 0
Bit 0
Bit 0
Bit 0
BPRT0
LVPEN
BPRT3
BPRT2
BPRT1
EE3
LIRDV
ADPU
Bit 7
ODD
RBOOT
RAM3
TILOP
ROMAD
EE2
CWOM
CSEL
6
EVEN
SMOD
RAM2
0
1
EE1
0
IRQE
5
LVPI
MDA
RAM1
OCCR
CLKX
EE0
IRVNE
DLY
4
BYTE
PSEL4
RAM0
CBYP
PAREN
0
0
0
0
LSBF
CME
3
ROW
PSEL3
REG3
DISR
NOSEC
SPR2
FCME
2
ERASE
PSEL2
REG2
FCM
NOCOP
XDV1
CR1
1
EELAT
PSEL1
REG1
FCOP
ROMON
XDV0
CR0
Bit 0
EEPGM
PSEL0
REG0
0
EEON
Reserved
MMSIZ
MMWBR
MXGS2
W2A15
MXGS1
W2A14
W2SZ1
W2A13
W2SZ0
0
0
0
W1SZ1
W1A13
W1SZ0
0
W1A15
W1A14
Table 4 M68HC11 K Series Register and Control Bit Assignments (Continued)
(Can be remapped to any 4-Kbyte boundary)
Bit 7
6
5
4
3
2
1
Bit 0
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