參數(shù)資料
型號(hào)： MC68HC11ED0VFU2
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, 2 MHz, MICROCONTROLLER, PQFP44
封裝： QFP-44
文件頁數(shù)： 45/108頁
文件大?。?/td> 1672K
代理商： MC68HC11ED0VFU2
Central Processor Unit (CPU)
Instruction Set
MC68HC11ED0 — Rev. 1.0
Technical Summary
Central Processor Unit (CPU)
TEST
TEST (Only in
Test Modes)
Address Bus Counts
INH
00
—
*
————
TPA
Transfer CC
Register to A
CCR
AINH
07
—
2
————
TST (opr)
Test for Zero or
Minus
M – 0
EXT
IND,X
IND,Y
7D
6D
18
6D
hh ll
ff
6
7
————
00
TSTA
Test A for Zero
or Minus
A – 0
A
INH
4D
—
2
————
00
TSTB
Test B for Zero
or Minus
B – 0
B
INH
5D
—
2
————
00
TSX
Transfer Stack
Pointer to X
SP + 1
IX
INH
30
—
3
————
TSY
Transfer Stack
Pointer to Y
SP + 1
IY
INH
18
30
—
4
————
TXS
Transfer X to
Stack Pointer
IX – 1
SP
INH
35
—
3
————
TYS
Transfer Y to
Stack Pointer
IY – 1
SP
INH
18
35
—
4
————
WAI
Wait for
Interrupt
Stack Regs & WAIT
INH
3E
—
**
————
XGDX
Exchange D
with X
IX
D, D IX
INH
8F
—
3
————
XGDY
Exchange D
with Y
IY
D, D IY
INH
18
8F
—
4
————
Table 3-2. Instruction Set (Sheet 7 of 7)
Mnemonic
Operation
Description
Addressing
Instruction
Condition Codes
Mode
Opcode
Operand
Cycles
S
X
H
I
N
Z
V
C
Cycle
*
Infinity or until reset occurs
**
12 cycles are used beginning with the opcode fetch. A wait state is entered which remains in effect for an integer number of MPU E-clock
cycles (n) until an interrupt is recognized. Finally, two additional cycles are used to fetch the appropriate interrupt vector (14 + n total).
Operands
dd
= 8-bit direct address ($0000–$00FF) (high byte assumed to be $00)
ff
= 8-bit positive offset $00 (0) to $FF (255) (is added to index)
hh
= High-order byte of 16-bit extended address
ii
= One byte of immediate data
jj
= High-order byte of 16-bit immediate data
kk
= Low-order byte of 16-bit immediate data
ll
= Low-order byte of 16-bit extended address
mm
= 8-bit mask (set bits to be affected)
rr
= Signed relative offset $80 (–128) to $7F (+127)
(offset relative to address following machine code offset byte))
Operators
( )
Contents of register shown inside parentheses
Is transferred to
Is pulled from stack
Is pushed onto stack
Boolean AND
+
Arithmetic addition symbol except where used as inclusive-OR symbol
in Boolean formula
⊕
Exclusive-OR
Multiply
:
Concatenation
–
Arithmetic subtraction symbol or negation symbol (two’s complement)
Condition Codes
—
Bit not changed
0
Bit always cleared
1Bit always set
Bit cleared or set, depending on operation
↓
Bit can be cleared, cannot become set
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關(guān)PDF資料
PDF描述
MC68HC11ED0VFN2 8-BIT, 2 MHz, MICROCONTROLLER, PQCC44
MC68HC11ED0VFN3 8-BIT, 3 MHz, MICROCONTROLLER, PQCC44
MC68HC11ED0MFU3 8-BIT, 3 MHz, MICROCONTROLLER, PQFP44
MC68HC11ED0CFU3 8-BIT, 3 MHz, MICROCONTROLLER, PQFP44
MC68HC11ED0MP2 8-BIT, 2 MHz, MICROCONTROLLER, PDIP40
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC11ED0VFU3 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Technical Summary
MC68HC11ED0VP2 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Technical Summary
MC68HC11ED0VP3 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Technical Summary
MC68HC11EX 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:APPENDIX A ELECTRICAL CHARACTERISTICS
MC68HC11EXC 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:APPENDIX A ELECTRICAL CHARACTERISTICS
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