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參數(shù)資料
| 型號(hào)： | MC68HC11ED0CFN3 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, 3 MHz, MICROCONTROLLER, PQCC44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁數(shù)： | 89/108頁 |
| 文件大?。?/td> | 1672K |
| 代理商： | MC68HC11ED0CFN3 |
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MC68HC11ED0 — Rev. 1.0
Technical Summary
Serial Peripheral Interface (SPI)
Technical Data — MC68HC11ED0
Section 8. Serial Peripheral Interface (SPI)
8.1 Contents
8.2 Introduction
The serial peripheral interface (SPI) allows the microcontroller unit
(MCU) to communicate synchronously with peripheral devices and other
microprocessors. When configured as a master, data transfer rates can
be as high as one-half the E clock rate (1.5 Mbits per second for a 3-MHz
bus frequency). When configured as a slave, data transfers can be as
fast as the E-clock rate (3 Mbits per second for a 3-MHz bus frequency).
When the SPI is enabled, all pins that are defined by the configuration
as inputs are inputs regardless of the state of the DDR bits of those pins.
All pins that are defined as outputs will be outputs only if the DDR bits for
those pins are set to 1. Any SPI output whose corresponding DDR bit is
cleared to 0 can be used as a general-purpose input. If the SPI system
is in master mode and DDRD bit 5 is set to 1, the port D bit 5 pin
becomes a general-purpose output instead of the SS input to the SPI
system. The MODF mode error flag function for which SS was used
becomes disabled to avoid interference between the general-purpose
output function and the SPI system.
Refer to Figure 8-1, which shows the SPI block diagram.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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