
Operating Modes and On-Chip Memory
Data Sheet
M68HC11E Family — Rev. 5
54
Operating Modes and On-Chip Memory
For More Information On This Product,
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MOTOROLA
2.4.2  Programming the EPROM with Downloaded Data 
When using this method, the EPROM is programmed by software while in the 
special test or bootstrap modes. User-developed software can be uploaded 
through the SCI or a ROM-resident EPROM programming utility can be used. The 
12-volt nominal programming voltage must be present on the XIRQ/V
PPE
 pin. To 
use the resident utility, bootload a 3-byte program consisting of a single jump 
instruction to $BF00. $BF00 is the starting address of a resident EPROM 
programming utility. The utility program sets the X and Y index registers to default 
values, then receives programming data from an external host, and puts it in 
EPROM. The value in IX determines programming delay time. The value in IY is a 
pointer to the first address in EPROM to be programmed (default = $D000). 
When the utility program is ready to receive programming data, it sends the host 
the $FF character. Then it waits. When the host sees the $FF character, the 
EPROM programming data is sent, starting with the first location in the EPROM 
array. After the last byte to be programmed is sent and the corresponding 
verification data is returned, the programming operation is terminated by resetting 
the MCU. 
For more information, Motorola application note AN1060 entitled 
M68HC11 
Bootstrap Mode
has been included at the back of this document. 
2.4.3  EPROM and EEPROM Programming Control Register 
The EPROM and EEPROM programming control register (PPROG) enables the 
EPROM programming voltage and controls the latching of data to be programmed. 
For MC68HC711E9, PPROG is also the EEPROM programming control 
register. 
For the MC68HC711E20, EPROM programming is controlled by the 
EPROG register and EEPROM programming is controlled by the PPROG 
register. 
ODD — Program Odd Rows in Half of EEPROM (Test) Bit
Refer to 
2.5 EEPROM
. 
EVEN — Program Even Rows in Half of EEPROM (Test) Bit
Refer to 
2.5 EEPROM
. 
Address: $103B
Bit 7
6
5
4
3
2
1
Bit 0
Read:
ODD
EVEN
ELAT
(1)
BYTE
ROW
ERASE
EELAT
EPGM
Write:
Reset:
0
0
0
0
0
0
0
0
1. MC68HC711E9 only
Figure 2-14. EPROM and EEPROM Programming
Control Register (PPROG)
F
Freescale Semiconductor, Inc.
n
.