
Timing System
Output Compare
M68HC11E Family — Rev. 5
Data Sheet
MOTOROLA
Timing System
149
register is compared to the free-running counter value during each E-clock cycle. 
If a match is found, the particular output compare flag is set in timer interrupt flag 
register 1 (TFLG1). If that particular interrupt is enabled in the timer interrupt mask 
register 1 (TMSK1), an interrupt is generated. In addition to an interrupt, a specified 
action can be initiated at one or more timer output pins. For OC[5:2], the pin action 
is controlled by pairs of bits (OMx and OLx) in the TCTL1 register. The output 
action is taken on each successful compare, regardless of whether or not the OCxF 
flag in the TFLG1 register was previously cleared. 
OC1 is different from the other output compares in that a successful OC1 compare 
can affect any or all five of the OC pins. The OC1 output action taken when a match 
is found is controlled by two 8-bit registers with three bits unimplemented: the 
output compare 1 mask register, OC1M, and the output compare 1 data register, 
OC1D. OC1M specifies which port A outputs are to be used, and OC1D specifies 
what data is placed on these port pins. 
9.4.1  Timer Output Compare Registers 
All output compare registers are 16-bit read-write. Each is initialized to $FFFF at 
reset. If an output compare register is not used for an output compare function, it 
can be used as a storage location. A write to the high-order byte of an output 
compare register pair inhibits the output compare function for one bus cycle. This 
inhibition prevents inappropriate subsequent comparisons. Coherency requires a 
complete 16-bit read or write. However, if coherency is not needed, byte accesses 
can be used. 
For output compare functions, write a comparison value to output compare 
registers TOC1–TOC4 and TI4/O5. When TCNT value matches the comparison 
value, specified pin actions occur. 
Register name: Timer Output Compare 1 Register (High)
Address: $1016
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Write:
Reset:
1
1
1
1
1
1
1
1
Register name: Timer Output Compare 1 Register (Low)
Address: $1017
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Write:
Reset:
1
1
1
1
1
1
1
1
Figure 9-8. Timer Output Compare 1 Register Pair (TOC1)
F
Freescale Semiconductor, Inc.
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