
Operating Modes and On-Chip Memory
Memory Map
M68HC11E Family — Rev. 5
Data Sheet
MOTOROLA
Operating Modes and On-Chip Memory
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51
REG[3:0] — 64-Byte Register Block Position 
These four bits specify the upper hexadecimal digit of the address for the 
64-byte block of internal registers. The register block, positioned at the 
beginning of any 4-Kbyte page in the memory map, is initialized to address 
$1000 out of reset. Refer to 
Table 2-5
. 
2.3.3.3  System Configuration Options Register 
The 8-bit, special-purpose system configuration options register (OPTION) sets 
internal system configuration options during initialization. The time protected 
control bits, IRQE, DLY, and CR[1:0], can be written only once after a reset and 
then they become read-only. This minimizes the possibility of any accidental 
changes to the system configuration.
Table 2-4. RAM Mapping
Table 2-5. Register Mapping
RAM[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Address
$0000–$0xFF
$1000–$1xFF
$2000–$2xFF
$3000–$3xFF
$4000–$4xFF
$5000–$5xFF
$6000–$6xFF
$7000–$7xFF
$8000–$8xFF
$9000–$9xFF
$A000–$AxFF
$B000–$BxFF
$C000–$CxFF
$D000–$DxFF
$E000–$ExFF
$F000–$FxFF
REG[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Address 
$0000–$003F 
$1000–$103F 
$2000–$203F 
$3000–$303F 
$4000–$403F 
$5000–$503F 
$6000–$603F 
$7000–$703F 
$8000–$803F 
$9000–$903F 
$A000–$A03F 
$B000–$B03F 
$C000–$C03F 
$D000–$D03F 
$E000–$E03F 
$F000–$F03F 
Address: $1039
Bit 7
6
5
4
3
2
1
Bit 0
Read:
ADPU
CSEL
IRQE
(1)
DLY
(1)
CME
CR1
(1)
CR0
(1)
Write:
Reset:
0
0
0
1
0
0
0
0
1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during
special modes.
= Unimplemented
Figure 2-13. System Configuration Options Register (OPTION)
F
Freescale Semiconductor, Inc.
n
.