參數資料
型號: MC68HC11A8VCFN2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: HCMOS Single-Chip Microcontroller
中文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQCC52
封裝: PLASTIC, LCC-52
文件頁數: 14/158頁
文件大?。?/td> 776K
代理商: MC68HC11A8VCFN2
MOTOROLA
1-2
INTRODUCTION
MC68HC11A8
TECHNICAL DATA
1
(SCI) and a separate synchronous serial peripheral interface (SPI) are included. The main
16-bit free-running timer system has three input capture lines, five output compare lines, and
a real-time interrupt function. An 8-bit pulse accumulator subsystem can count external
events or measure external periods.
Self monitoring circuitry is included on-chip to protect against system errors. A computer op-
erating properly (COP) watchdog system protects against software failures. A clock monitor
system generates a system reset in case the clock is lost or runs too slow. An illegal opcode
detection circuit provides a non-maskable interrupt if an illegal opcode is detected.
Two software controlled operating modes, WAIT and STOP, are available to conserve addi-
tional power.
Figure 1-1 Block Diagram
1.3 Programmer’s Model
In addition to being able to execute all M6800 and M6801 instructions, the MC68HC11A8 al-
lows execution of 91 new opcodes.
Figure 1-2
available to the programmer.
shows the seven CPU registers which are
SPI
A/D CONVERTER
SCI
PORT D
CONTROL
EXTAL
XTAL
E
OSCILLATOR
CLOCK LOGIC
INTERRUPT LOGIC
MODA/
LIR
MODB/
V
STBY
TIMER
SYSTEM
CPU
C
P
STROBE AND HANDSHAKE
PARALLEL I/O
PORT B
P
P
P
P
P
P
P
P
PORT C
P
P
P
P
P
P
P
P
S
S
P
P
P
P
P
P
PORT E
*
P
*
P
*
P
*
P
P
P
P
P
CONTROL
PORT A
P
P
P
P
P
P
P
P
BUS EXPANSION
ADDRESS
ADDRESS/DATA
R
A
S
S
P
MODE
CONTROL
XIRQ
IRQ
RESET
M
M
*
NOT BONDED ON 48-PIN VERSION.
256 BYTES RAM
512 BYTES EEPROM
8 KBYTES ROM
V
RL
V
RH
V
SS
V
DD
T
R
A8 BLOCK
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