
Serial Communications Interface Module (SCI)
MC68HC908KX8 MC68HC908KX2 MC68HC08KX8 Data Sheet, Rev. 2.1
122
Freescale Semiconductor
With the misaligned character shown in
Figure 12-8, the receiver counts 154 RT cycles at the point
when the count of the transmitting device is 9 bit times
× 16 RT cycles + 3 RT cycles = 147 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a slow 8-bit
character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times
× 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
Figure 12-8, the receiver counts 170 RT cycles at the point
when the count of the transmitting device is
10 bit times
× 16 RT cycles + 3 RT cycles = 163 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a slow 9-bit
character with no errors is
Fast Data Tolerance
Figure 12-9 shows how much a fast received character can be misaligned without causing a noise
error or a framing error. The fast stop bit ends at RT10 instead of RT16 but is still there for the stop bit
data samples at RT8, RT9, and RT10.
Figure 12-9. Fast Data
For an 8-bit character, data sampling of the stop bit takes the receiver
9bit times
× 16 RT cycles + 10 RT cycles = 154 RT cycles.
With the misaligned character shown in
Figure 12-9, the receiver counts 154 RT cycles at the point
when the count of the transmitting device is 10 bit times
× 16 RT cycles = 160 RT cycles.
The maximum percent difference between the receiver count and the transmitter count of a fast 8-bit
character with no errors is
For a 9-bit character, data sampling of the stop bit takes the receiver
10 bit times
× 16 RT cycles + 10 RT cycles = 170 RT cycles.
With the misaligned character shown in
Figure 12-9, the receiver counts 170 RT cycles at the point
when the count of the transmitting device is 11 bit times
× 16 RT cycles = 176 RT cycles.
154
147
–
154
--------------------------
100
×
4.54%
=
170
163
–
170
--------------------------
100
×
4.12%
=
IDLE OR NEXT CHARACTER
STOP
RT1
RT2
RT3
RT4
RT5
RT6
RT7
RT8
RT9
RT1
0
RT1
1
RT1
2
RT1
3
RT1
4
RT1
5
RT1
6
DATA
SAMPLES
RECEIVER
RT CLOCK
154
160
–
154
--------------------------
100
×
3.90%.
=