Electrical Specifications
MC68HC08AZ60 — Rev 1.1
Technical Data
Freescale Semiconductor
Electrical Specifications
433
26.2.5 Control Timing
NOTES:
1.
VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = –40 °C to +TA (MAX, unless otherwise noted.
2.
Run (Operating) IDD measured using external square wave clock source (fOP = 8.4 MHz). All inputs
0.2 V from rail. No dc loads. Less than 100 pF on all outputs. CL = 20 pF on OSC2. All ports
configured as inputs. OSC2 capacitance linearly affects run IDD. Measured with all modules enabled.
3.
Wait IDD measured using external square wave clock source (fOP = 8.0 MHz). All inputs 0.2 Vdc from
rail. No dc loads. Less than 100 pF on all outputs, CL = 20 pF on OSC2. All ports configured as in-
puts.
OSC2 capacitance linearly affects wait IDD. Measured with all modules enabled.
4.
Stop IDD measured with OSC1 = VSS.
5.
Maximum is highest voltage that POR is guaranteed.
6.
Maximum is highest voltage that POR is possible.
7.
If minimum VDD is not reached before the internal POR reset is released, RST must be driven low
externally until minimum VDD is reached.
8.
9.
Although IDD is proportional to bus frequency, a current of several mA is present even at very low frequencies.
Characteristic
Symbol
Min
Max
Unit
Bus Operating Frequency (4.5–5.5 V — VDD Only)
fBUS
—8.4
MHz
RESET Pulse Width Low
tRL
1.5
—
tcyc
IRQ Interrupt Pulse Width Low (Edge-Triggered)
tILHI
1.5
—
tcyc
IRQ Interrupt Pulse Period
tILIL
Note 4
—
tcyc
16-Bit Timer (see Note 2)
Input Capture Pulse Width (see Note 3)
Input Capture Period
tTH, tTL
tTLTL
2
Note 4
—
tcyc
MSCAN Wake-up Filter Pulse Width (see Note 5)
tWUP
25
s
NOTES:
1.VDD = 5.0 Vdc ± 0.5v, VSS = 0 Vdc, TA = –40 °C to TA(MAX), unless otherwise noted.
2.The 2-bit timer prescaler is the limiting factor in determining timer resolution.
4.The minimum period tTLTL or tILIL should not be less than the number of cycles it takes to execute the capture interrupt
service routine plus TBD tcyc.
5. The minimum pulse width to wake up the MSCAN module is guaranteed by design but not tested.