- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄69027 > MC68HC08AS20CFN (MOTOROLA INC) 8-BIT, MROM, MICROCONTROLLER, PQCC52 PDF資料下載
參數(shù)資料
| 型號： | MC68HC08AS20CFN |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, MICROCONTROLLER, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁數(shù)： | 35/96頁 |
| 文件大?。?/td> | 3243K |
| 代理商： | MC68HC08AS20CFN |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁當前第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁
4
MOTOROLA
4-4
MC68HC05E0
RESETS, INTERRUPTS AND LOW POWER MODES
Table 4-1 shows the relative priority of all the possible interrupt sources. Internally, the External
Interrupt, Real Time Interrupt, and Wake-up signals are “ORed” to generate the CPU interrupt
signal IRQB. The source responsible for generating the IRQB interrupt can be determined by
examining the interrupt ag bits associated with these sources.
Note:
The external interrupt INTX can be disabled by setting the External Interrupt Mask bit
(INTMX) in the Interrupt Control Register ($000E).
For example, if both an external interrupt and a Timer A interrupt are pending at the end of an
instruction execution, the external interrupt is serviced rst.
The software interrupt SWI is executed in the same way as any other instruction, regardless of the
state of the I-bit.
4.2.1
Hardware Controlled Interrupt Sequence
The following three functions (RESET, STOP, and WAIT) are not in the strictest sense interrupts.
However, they are acted upon in a similar manner. Flowcharts for hardware interrupts are shown
in Figure 4-3, and for STOP and WAIT in Figure 4-4.
RESET:
A reset condition causes the program to vector to its starting address which is specied
by the contents of memory locations $FFFE (MSB) and $FFFF (LSB). The I bit in the
condition code register is also set.
STOP:
The STOP instruction causes the oscillator to be turned off and the processor to “sleep”
until an external interrupt (INTX) (if enabled), a wake-up interrupt (if enabled) or reset
occurs.
WAIT:
The WAIT instruction causes all processor clocks to stop, but leaves the timer clock
running. This “rest” state of the processor can be cleared by reset, an external interrupt
(INTX) (if enabled), a wake-up interrupt or a Timer/SI interrupt. There are no special
wait vectors for these individual interrupts.
Table 4-1 Interrupt Priorities
Source
Vector address
Priority
Real time interrupt
$FFFA, $FFFB
highest
External interrupt (INTX)
Wake-up (Port C)
Timer A
$FFF8, $FFF9
Timer B
$FFF6, $FFF7
Serial interface
$FFF4, $FFF5
lowest
40
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC08AZ48AVFU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC08AZ60FU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC08AZ60FU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC08AZ60MFU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| MC68HC08AZ60VFU | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC08AZ0 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Advance Information |
| MC68HC08AZ0CFU | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Advance Information |
| MC68HC08AZ16 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC08AZ24 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC08AZ32 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Advance Information |
發(fā)布緊急采購，3分鐘左右您將得到回復。