參數(shù)資料
型號(hào): MC68HC05V12CFNR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68
封裝: PLASTIC, LCC-68
文件頁(yè)數(shù): 72/135頁(yè)
文件大?。?/td> 2080K
代理商: MC68HC05V12CFNR2
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General Description
Decoupling Recommendations
MC68HC05V12 Rev. 2.0
Technical Data
MOTOROLA
General Description
35
NON-DISCLOSURE
AGREEMENT
REQUIRED
1.8 Decoupling Recommendations
To provide effective decoupling and to reduce radiated RF (radio
frequency) emissions, small decoupling capacitors must be located as
close to the supply pins as possible. The self-inductance of these
capacitors and the parasitic inductance and capacitance of the
interconnecting traces determine the self-resonant frequency of the
decoupling network. A frequency that is too low will reduce decoupling
effectiveness and could increase radiated RF emissions from the
system. A low value capacitor (470 pF to 0.01
F) placed in parallel with
the other capacitors will improve the bandwidth and effectiveness of the
network.
1.8.1 VDD to VSSD: MCU Internal Digital Power Decoupling
Decouple with a 0.1
F ceramic or polystyrene cap. If the self-resonance
frequency of the decoupling circuit (assume 4 nH per bond wire) is too
low, add a 0.01
F or smaller cap in parallel to increase the bandwidth
of the decoupling network. Place the smaller cap closest to the VDD and
VSSD pins.
1.8.2 VCCA to VSSA: Analog Subsystem Power Supply Pins
These pins are internally isolated from the digital VDD and VSS supplies.
The VSSA pin provides a ground return for the A/D subsystem and
portions of the gauge subsystem. The analog supply pins should be
appropriately filtered to prevent any external noise affecting the analog
subsystems. The VSSA pin should be brought together with the digital
ground at a single point which has a low (HF) impedance to ground to
prevent common mode noise problems. If this is not practical, then the
VSSA PCB traces should be routed in such a manner that digital ground
return current is impeded from passing through the analog input ground
reference as shown in Figure 1-5.
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