參數(shù)資料
型號(hào)： MC68HC05SR3CFB
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PQFP44
封裝： QFP-44
文件頁數(shù)： 64/96頁
文件大?。?/td> 3143K
代理商： MC68HC05SR3CFB
MC68HC05SR3
Freescale
8-13
CPU CORE AND INSTRUCTION SET
8
8.3.8
Relative
The relative addressing mode is only used in branch instructions. In relative addressing, the
contents of the 8-bit signed byte (the offset) following the opcode are added to the PC if, and only
if, the branch conditions are true. Otherwise, control proceeds to the next instruction. The span of
relative addressing is from –126 to +129 from the opcode address. The programmer need not
calculate the offset when using the Freescale assembler, since it calculates the proper offset and
checks to see that it is within the span of the branch.
EA = PC+2+(PC+1); PC
← EA if branch taken;
otherwise EA = PC
← PC+2
8.3.9
Bit set/clear
In the bit set/clear addressing mode, the bit to be set or cleared is part of the opcode. The byte
following the opcode specifies the address of the byte in which the specified bit is to be set or
cleared. Any read/write bit in the first 256 locations of memory, including I/O, can be selectively set
or cleared with a single two-byte instruction.
EA = (PC+1); PC
← PC+2
Address bus high
← 0; Address bus low ← (PC+1)
8.3.10
Bit test and branch
The bit test and branch addressing mode is a combination of direct addressing and relative
addressing. The bit to be tested and its condition (set or clear) is included in the opcode. The
address of the byte to be tested is in the single byte immediately following the opcode byte (EA1).
The signed relative 8-bit offset in the third byte (EA2) is added to the PC if the specified bit is set
or cleared in the specified memory location. This single three-byte instruction allows the program
to branch based on the condition of any readable bit in the first 256 locations of memory. The span
of branch is from –125 to +130 from the opcode address. The state of the tested bit is also
transferred to the carry bit of the condition code register.
EA1 = (PC+1); PC
← PC+2
Address bus high
← 0; Address bus low ← (PC+1)
EA2 = PC+3+(PC+2); PC
← EA2 if branch taken;
otherwise PC
← PC+3
TPG
65
05SR3.Book Page 13 Thursday, August 4, 2005 1:08 PM
相關(guān)PDF資料
PDF描述
MC68HC05T7B 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP56
MC68HC05V12CFNR2 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQCC68
MC68HC08AS20FNR2 8-BIT, MROM, MICROCONTROLLER, PQCC52
MC68HC08AS20VFNR2 8-BIT, MROM, MICROCONTROLLER, PQCC52
MC68HC08AS20CFN 8-BIT, MROM, MICROCONTROLLER, PQCC52
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MC68HC05SU3A 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Fully static chip design featuring the industry standard 8-bit M68HC05 core
MC68HC05T16 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
MC68HC05V12 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontreller Unit
MC68HC05V12CFN 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification
MC68HC05X16 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:High-density complementary metal oxide semiconductor HCMOS) microcontroller unit
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*