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參數(shù)資料
| 型號： | MC68HC05RC17DW |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.097 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁數(shù)： | 58/128頁 |
| 文件大?。?/td> | 4788K |
| 代理商： | MC68HC05RC17DW |
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Central Processor Unit (CPU)
Accumulator
MC68HC05RC17 — Rev. 2.0
General Release Specification
Central Processor Unit (CPU)
NON-DISCLOSURE
AGREEMENT
REQUIRED
3.4 Accumulator
The accumulator (A) is a general-purpose 8-bit register used to hold
operands and results of arithmetic calculations or data manipulations.
3.5 Index Register
The index register (X) is an 8-bit register used for the indexed
addressing value to create an effective address. The index register may
also be used as a temporary storage area.
3.6 Condition Code Register
The condition code register (CCR) is a 5-bit register in which the H, N,
Z, and C bits are used to indicate the results of the instruction just
executed, and the I bit is used to enable or disable interrupts. These bits
can be individually tested by a program, and specific actions can be
taken as a result of their state. Each bit is explained in the following
paragraphs.
Half Carry (H)
This bit is set during ADD and ADC operations to indicate that a carry
occurred between bits 3 and 4.
Interrupt (I)
When this bit is set, the timer and external interrupt are masked
(disabled). If an interrupt occurs while this bit is set, the interrupt is
latched and processed as soon as the I bit is cleared.
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A
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CCR
HIN
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C
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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