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參數(shù)資料
| 型號(hào)： | MC68HC05PV8AYDW |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4.2 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁(yè)數(shù)： | 173/196頁(yè) |
| 文件大?。?/td> | 4967K |
| 代理商： | MC68HC05PV8AYDW |
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Technical Data
MC68HC(8)05PV8/A — Rev. 1.9
Resets
NO
NDISCLOSURE
AGREEMENT
REQUIRED
5.3 Reset status register (RSR)
This register contains eight flags that show the source of the last reset.
A power-on reset sets the POR bit in the system control register and
clears all other bits in the reset status register. All bits can be cleared by
writing a one to the corresponding bit. Uncleared bits remain set as long
as they are not cleared by a power-on reset or by software.
PINR – External Reset Bit
1 = Last reset caused by external reset pin (RESET)
0 = No pin reset since PINR was cleared by software or POR
STOPR – Illegal STOP Instruction Reset Bit
Indicates the last reset was caused by a disabled STOP instruction.
1 = Last reset caused by a disabled STOP instruction
0 = No illegal STOP instruction since STOPR was cleared by
software or POR
COPR – COP (Computer Operating Properly) Reset Bit
1 = Last reset caused by COP
0 = No COP reset since COPR was cleared by software or POR
ILINR – Illegal Instruction Reset Bit
1 = Last reset caused by an instruction fetch from an illegal address
0 = No illegal instruction fetch reset since ILINR was cleared by
software or POR
CMR – Clock Monitor Reset Bit
1 = Last reset caused by the clock monitor due to a failure on
system clock or system clock is back. Refer to RCON status bit
in the interrupt status register
0 = No clock monitor reset since CMR was cleared by software or
POR
$002A
Bit 7
654321
Bit 0
Read:
PINR
STOPR
COPR
ILINR
CMR
HTR
HVR
LVR
Write:
POR:
00000000
Figure 5-1 Reset Status Register (RSR)
Freescale
Semiconductor,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
nc.
..
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相關(guān)代理商/技術(shù)參數(shù) |
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