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參數(shù)資料
| 型號： | MC68HC05P9AVP |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28 |
| 封裝： | PLASTIC, DIP-28 |
| 文件頁數(shù)： | 74/90頁 |
| 文件大?。?/td> | 285K |
| 代理商： | MC68HC05P9AVP |
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GENERAL RELEASE SPECIFICATION
MOTOROLA
ELECTRICAL SPECIFICATIONS
MC68HC05P9A
13-2
Rev. 2.0
13.3
DC Electrical Characteristics
Table 13-1. DC Electrical Characteristics (VDD = 5 V)
(VDD = 5.0 Vdc ± 10%, VSS = 0 Vdc, TA = -40°C to +125°C, unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Voltage
I
LOAD = 10.0 A
I
LOAD = -10.0 A
V
OL
V
OH
—
V
DD-0.1
—
0.1
—
V
Output High Voltage
(I
LOAD = -0.8 mA) PA0-PA7, PB5-PB7, PC2-PC7, PD5, TCMP
(I
LOAD = -5.0 mA) PC0-PC1
V
OH
V
OH
V
DD-0.8
V
DD-0.8
—
V
Output Low Voltage
(I
LOAD = 1.6 mA) PA0-PA7, PB5-PB7, PC2-PC7, PD5, TCMP
(I
LOAD = 15 mA) PC0-PC1
V
OL
V
OL
—
0.4
V
Input High Voltage
PA0-PA7, PB5-PB7, PC0-PC7, PD5, TCAP/PD7,
IRQ, RESET, OSC1
V
IH
0.7
× V
DD
—V
DD
V
Input Low Voltage
PA0-PA7, PB5-PB7, PC0-PC7, PD5, TCAP/PD7,
IRQ, RESET, OSC1
V
IL
V
SS
—
0.2
× V
DD
V
Supply Current
Run (A/D Enabled)
Wait (A/D Enabled)
Wait (A/D Disabled)/Halt
Stop
25
°C
0
°C to +70°C
-40
°C to +85°C
-40
°C to +105°C
-40
°C to +125°C
I
DD
—
3.3
1.7
1.0
2
—
TBD
5
TBD
100
mA
A
I/O Ports Hi-Z Leakage Current
PA0-PA7, PB5-PB7, PC0-PC2, PD5
IIL
——
± 10
A
A/D Ports Hi-Z Leakage Current
PC3–PC7
IOZ
——
± 1
A
Input Current
RESET, IRQ, OSC1, TCAP/PD7
I
IN
——
± 1
A
I/O Ports Switch Resistance
(Pullup Enabled PA0-PA7)
RPTA
TBD
15
TBD
k
Capacitance
Ports (as Input or Output)
RESET, IRQ
C
OUT
C
IN
—
12
8
pF
NOTES:
1. All values shown reflect average measurements.
2. Typical values at midpoint of voltage range, 25
°C.
3. Wait IDD: Only timer system active.
4. Run (Operating) IDD, Wait IDD: Measured using external square wave clock source (fosc= 4.2 MHz), all inputs 0.2 V from
rail; no dc loads, less than 50 pF on all outputs, CL = 20 pF on OSC2.
5. Wait, Stop IDD: All ports configured as inputs, VIL = 0.2 V, VIH = VDD -0.2 V.
6. Wait IDD is affected linearly by the OSC2 capacitance.
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