參數(shù)資料
型號: MC68HC05P1ADWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 52/124頁
文件大?。?/td> 623K
代理商: MC68HC05P1ADWR2
CPU Core
CPU Registers
MC68HC05P1A Rev. 3.0
General Release Specification
MOTOROLA
CPU Core
33
NON-DISCLOSURE
AGREEMENT
REQUIRED
3.3.1 Accumulator
The accumulator (A) is a general-purpose 8-bit register used to hold
operands and results of arithmetic calculations or data manipulations.
3.3.2 Index Register
The index register (X) is an 8-bit register used for the indexed
addressing value to create an effective address. The index register also
may be used as a temporary storage area.
In indexed addressing with no offset, the index register contains the low
byte of the operand address, and the high byte is assumed to be $00. In
indexed addressing with an 8-bit offset, the CPU finds the operand
address by adding the index register contents to an 8-bit immediate
value. In indexed addressing with a 16-bit offset, the CPU finds the
operand address by adding the index register contents to a 16-bit
immediate value.
3.3.3 Stack Pointer
The stack pointer (SP) contains the address of the next free location on
the stack. During an MCU reset or the reset stack pointer (RSP)
instruction, the stack pointer is set to location $00FF. The stack pointer
is then decremented as data is pushed onto the stack and incremented
as data is pulled from the stack.
When accessing memory, the eight most significant bits (MSB) are
permanently set to 00000011. These eight bits are appended to the six
least significant bits (LSB) to produce an address within the range of
$00FF to $00C0. Subroutines and interrupts may use up to 64 (decimal)
locations. If 64 locations are exceeded, the stack pointer wraps around
70
A
70
X
相關PDF資料
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