參數(shù)資料
型號: MC68HC05P18CP
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDIP28
封裝: PLASTIC, DIP-28
文件頁數(shù): 5/144頁
文件大?。?/td> 1348K
代理商: MC68HC05P18CP
Advance Information
MC68HC(8)05P18 — Rev. 2.0
102
Serial Input/Output Port (SIOP)
MOTOROLA
Serial Input/Output Port (SIOP)
11.3.3 Serial Data Output (SDO)
The SDO pin becomes an output as soon as the SIOP subsystem is
enabled. Prior to enabling the SIOP, PB5 can be initialized to determine
the beginning state. While the SIOP is enabled, PB5 cannot be used as
a standard output since that pin is connected to the last stage of the
SIOP serial shift register. The data can be transmitted in either MSB first
format or the LSB format by programming the MOR1.
On the first falling edge of SCK, the first data bit will be shifted out to the
SDO pin. The remaining data bits will be shifted out to the SDI pin on
subsequent falling edges of SCK. The SDO pin will present valid data at
least 100 nanoseconds before the rising edge of the SCK and remain
valid for 100 nanoseconds after the rising edge of SCK. See
11.4 SIOP Registers
The SIOP is programmed and controlled by the SIOP control register
(SCR) located at address $000A, the SIOP status register (SSR) located
at address $000B, and the SIOP data register (SDR) located at address
$000C.
11.4.1 SIOP Control Register
This register is located at address $000A and contains two bits.
Figure 11-3 shows the position of each bit in the register and indicates
the value of each bit after reset.
Address:
$000A
BIt 7
654321
Bit 0
Read:
0
SPE
0
MSTR
0000
Write:
Reset:
00000000
= Unimplemented
Figure 11-3. SIOP Control Register (SCR)
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