- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄45221 > MC68HC05P18ADWE (FREESCALE SEMICONDUCTOR INC) 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 PDF資料下載
參數(shù)資料
| 型號(hào)： | MC68HC05P18ADWE |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | SOIC-28 |
| 文件頁(yè)數(shù)： | 127/130頁(yè) |
| 文件大?。?/td> | 1310K |
| 代理商： | MC68HC05P18ADWE |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)當(dāng)前第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)
NON-DISCLOSURE
AGREEMENT
REQUIRED
Analog-to-Digital (A/D) Converter
Technical Data
MC68HC05P18A
Analog-to-Digital (A/D) Converter
11.7 A/D Conversion Value Data Register
This register contains the output of the A/D converter. See Figure 11-2.
11.8 A/D Subsystem Operation during Wait Mode and Halt Mode
The A/D subsystem continues normal operation during wait mode and
halt mode. To decrease power consumption during wait or halt, the
ADON bit in the ADSC register and the EERC bit in the EEPROG
register should be cleared if the A/D subsystem is not being used.
11.9 A/D Subsystem Operation during Stop Mode
When stop mode is enabled, execution of the STOP instruction
terminates all A/D subsystem functions. Any pending conversion is
aborted. When the oscillator resumes operation upon leaving the stop
mode, a finite amount of time passes before the A/D subsystem
stabilizes sufficiently to provide conversions at its rated accuracy. The
delays built into the MC68HC05P18A when coming out of stop mode are
sufficient for this purpose. No explicit delays need to be added to the
application software.
Address:
$001D
Bit 7
654321
Bit 0
Read:
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
Write:
Reset:
Unaffected by reset
= Unimplemented
R
= Reserved
Figure 11-2. A/D Conversion Value Data Register (ADC)
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MC68HC05P18ADWR3 | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC05P18ACDWR3 | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC05P18AMDWR2 | 8-BIT, MROM, MICROCONTROLLER, PDSO28 |
| MC68HC05P18ADWR3 | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| MC68HC05P18AMDWR3 | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MC68HC05P18AMDW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05P18AMP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05P18AP | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:HCMOS Microcontroller Unit |
| MC68HC05P1A | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
| MC68HC05P1ADW | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:General Release Specification |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。