參數(shù)資料
型號: MC68HC05P18ACDW
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: SOIC-28
文件頁數(shù): 81/130頁
文件大?。?/td> 1310K
代理商: MC68HC05P18ACDW
NON-DISCLOSURE
AGREEMENT
REQUIRED
Operating Modes
Technical Data
MC68HC05P18A
Operating Modes
If the 16-bit timer interrupt is enabled, it causes the processor to exit wait
mode and resume normal operation. The 16-bit timer may be used to
generate a periodic exit from wait mode. Wait mode may also be exited
when an IRQ or RESET occurs.
NOTE:
If port A interrupts are selected as a mask option, the processor also will
exit wait mode.
6.5 COP Watchdog Timer Considerations
The COP watchdog timer is active in the user mode of operation when
selected by mask option. Executing the STOP instruction without
conversion to halt via mask option causes the COP to be disabled.
Therefore, it is recommended that the STOP instruction be modified to
produce halt mode via mask option if the COP watchdog timer is
enabled.
Furthermore, it is recommended that the COP watchdog timer be
disabled for applications that use the halt or wait mode for time periods
that exceed the COP timeout period.
COP watchdog timer interactions are summarized in Table 6-1.
Table 6-1. COP Watchdog Timer Recommendations
IF These Conditions Exist:
THEN the COP Watchdog
Timer Should:
STOP Instruction
WAIT Time
Halt mode selected
via mask option
WAIT time less than
COP timeout
Enable or disable COP
via mask option
Halt mode selected
via mask option
WAIT time MORE than
COP timeout
Disable COP
via mask option
Stop mode selected
via mask option
Any length WAIT time
Disable COP
via mask option
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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