參數(shù)資料
型號: MC68HC05K1DWR2
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2 MHz, MICROCONTROLLER, PDSO16
封裝: SOIC-16
文件頁數(shù): 79/154頁
文件大?。?/td> 1544K
代理商: MC68HC05K1DWR2
Technical Data
MC68HC05K0 MC68HC05K1 — Rev. 2.0
30
Memory
MOTOROLA
Technical Data
2.3 Input/Output Section
The first 32 addresses of the memory space, $0000–$001F, are the I/O
section. These are the addresses of the I/O control registers, status
registers, and data registers. Figure 2-2 is a register map of the I/O
section.
2.4 RAM
The 32 addresses from $00E0 to $00FF serve as both the user RAM and
the stack RAM. The CPU uses five RAM bytes to save all CPU register
contents before processing an interrupt. During a subroutine call, the
CPU uses two bytes to store the return address. The stack pointer
decrements during pushes and increments during pulls.
NOTE:
Be careful when using nested subroutines or multiple interrupt levels.
The CPU may overwrite data in the RAM during a subroutine or during
the interrupt stacking operation.
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