參數(shù)資料
型號： MC68HC05E5DW
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝： SOIC-28
文件頁數(shù)： 135/140頁
文件大?。?/td> 847K
代理商： MC68HC05E5DW
NON-DISCLOSURE
AGREEMENT
REQUIRED
Synchronous Serial Interface (SSI)
General Release Specification
MC68HC05E5 — Rev. 1.0
94
Synchronous Serial Interface (SSI)
MOTOROLA
12.2 Introduction
This synchronous serial I/O module is also used on the MC68HC05X1.
The module is similar to the SIOP used on the MC68HC05P7 and the
MC68HC705P9 and the SPI used on the MC68HC05L5.
The SSI is a 2-wire master/slave system including serial clock (SCK) and
serial data input output (SDIO). Data is transferred eight bits at a time.
An interrupt may be generated at the completion of each transfer, and a
software programmable option determines whether the SSI transfers
data most significant bit (MSB) or least significant bit (LSB) first. When
operating as a master device, the serial clock speed is selectable
between four rates; as a slave device, the clock speed may be chosen
over a wide range. Refer to Figure 12-1.
In master mode, transmission is initiated by a write to the SSI data
register (SDR). A transfer cannot be initiated in slave mode; however,
the external master will initiate the transfer. The programmer must
choose between master or slave mode before the SSI is enabled. It is up
to the programmer to ensure that only one master exists in the system
at any one time. All devices in the system must operate with the same
clock polarity and data rates. Slaves should always be disabled before
before the slaves are enabled.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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