參數(shù)資料
型號: MC68HC05C8FB
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PQFP44
封裝: QFP-44
文件頁數(shù): 147/156頁
文件大?。?/td> 1755K
代理商: MC68HC05C8FB
Serial Peripheral Interface (SPI)
Advance Information
MC68HC05C8A — Rev. 4.0
90
Serial Peripheral Interface (SPI)
MOTOROLA
In a slave mode, the slave select start logic receives a logic low at the
SS pin and a clock at the SCK pin. Thus, the slave is synchronized with
the master. Data from the master is received serially at the MOSI line
and loads the 8-bit shift register. After the 8-bit shift register is loaded, its
data is parallel transferred to the read buffer. During a write cycle, data
is written into the shift register, then the slave waits for a clock train from
the master to shift the data out on the slave’s MISO line.
Figure 10-3 illustrates the MOSI, MISO, SCK, and SS master-slave
interconnections.
Figure 10-3. Serial Peripheral Interface Master-Slave Interconnection
10.6 SPI Registers
This subsection describes the three registers in the SPI which provide
control, status, and data storage functions. These registers are:
Serial peripheral control register (SPCR)
Serial peripheral status register (SPSR)
Serial peripheral data I/O register (SPDR)
I/O PORT
SPDR ($000C)
SPI SHIFT REGISTER
PD3/MOSI
PD2/MISO
PD4/SCK
MASTER MCU
SLAVE MCU
SS
PD5
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