
MOTOROLA
4-4
MC68HC05BD3
RESETS AND INTERRUPTS
4
Figure 4-2
Interrupt Stacking Order
Table 4-1
Reset/Interrupt Vector Addresses
Register
–
–
–
SSCR
MSR
Flag Name
–
–
–
–
MIF
TOF
RTIF
–
–
Interrupt
Reset
Software
External Interrupt
VSYNC
M-Bus
Timer Overflow
Real Time Interrupt
–
–
CPU Interrupt
RESET
SWI
IRQ
SSP
MBUS
Vector Address
$3FFE-$3FFF
$3FFC-$3FFD
$3FFA-$3FFB
$3FF8-$3FF9
$3FF6-$3FF7
Priority
highest
MFTCSR
MFT
$3FF4-$3FF5
–
–
–
–
$3FF2-$3FF3
$3FF0-$3FF1
CONDITION CODE REGISTER
ACCUMULATOR
INDEX REGISTER
PROGRAM COUNTER (HIGH BYTE)
PROGRAM COUNTER (LOW BYTE)
$00C0 (BOTTOM OF STACK)
$00C1
$00C2
$00FD
$00FE
$00FF (TOP OF STACK)
UNSTACKING
ORDER
1
2
3
4
5
5
4
3
2
1
STACKING
ORDER
lowest
TPG